Rollup of 16 pull requests #145728
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Rollup of 16 pull requests #145728
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…gain
This will be faster, and also it deduplicates the code so win/win
The dup() is actually infallible here. But whatever.
Before:
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 1 ([{fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f5749313050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 2 ([{fd=0, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 0
openat(AT_FDCWD, "/dev/null", O_RDWR) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7efe12006050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 3 ([{fd=0, revents=POLLNVAL}, {fd=1, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 0
openat(AT_FDCWD, "/dev/null", O_RDWR) = 1
openat(AT_FDCWD, "/dev/null", O_RDWR) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7fc2dc7ca050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
After:
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 1 ([{fd=1, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 1
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f488a3fb050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 2 ([{fd=1, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 1
dup(1) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f1a8943c050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 3 ([{fd=0, revents=POLLNVAL}, {fd=1, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 0
dup(0) = 1
dup(0) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f4e3a4c7050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
While some neon and crypto features may not be supported on the switch at boot (e.g. on the a53 cores), the features will _always_ be available if running as a sysmodule or homebrew application under Horizon/Atmosphere.
This makes it easier to debug issues with MIR building by inserting dump_for_debugging calls around the suspected code responsible for the bad MIR.
They would break cross-compilation.
By using `minicore`, `&raw` and removing use of `link_llvm_intrinsics`
…or predicate query instability
All of these were demoted to tier 3 a while ago and we aren't building LLVM for them anymore. Signed-off-by: Jens Reidel <[email protected]>
Consolidate all the panicking functions in `slice/index.rs` to use a single `slice_index_fail` function, similar to how it is done in `str/traits.rs`.
libstd: init(): dup() subsequent /dev/nulls instead of opening them again
This will be faster, and also it deduplicates the code so win/win
The dup() is actually infallible here. But whatever.
Before:
```
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 1 ([{fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f5749313050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 2 ([{fd=0, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 0
openat(AT_FDCWD, "/dev/null", O_RDWR) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7efe12006050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 3 ([{fd=0, revents=POLLNVAL}, {fd=1, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 0
openat(AT_FDCWD, "/dev/null", O_RDWR) = 1
openat(AT_FDCWD, "/dev/null", O_RDWR) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7fc2dc7ca050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
```
After:
```
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 1 ([{fd=1, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 1
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f488a3fb050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 2 ([{fd=1, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 1
dup(1) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f1a8943c050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
poll([{fd=0, events=0}, {fd=1, events=0}, {fd=2, events=0}], 3, 0) = 3 ([{fd=0, revents=POLLNVAL}, {fd=1, revents=POLLNVAL}, {fd=2, revents=POLLNVAL}])
openat(AT_FDCWD, "/dev/null", O_RDWR) = 0
dup(0) = 1
dup(0) = 2
rt_sigaction(SIGPIPE, {sa_handler=SIG_IGN, sa_mask=[PIPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f4e3a4c7050}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 8) = 0
```
…-multiple-abis-arm, r=RalfJung,davidtwco c-variadic: multiple ABIs in the same program for arm similar to rust-lang#144379, but for arm, requested in rust-lang#144066. Quoting rust-lang/reference#1946 (comment) > `"aapcs"` specifically refers to the soft-float ABI where floating-point values are passed in integer registers. However for c-variadic functions, `aapcs` behaves the same as `C`: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#65parameter-passing > A variadic function is always marshaled as for the base standard. https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#7the-standard-variants > This section applies only to non-variadic functions. For a variadic function the base standard is always used both for argument passing and result return. --- I also noticed that rustc currently emit more instructions than clang for c-variadic functions on arm, see https://godbolt.org/z/hMce9rnTh. I'll fix that separately. (edit: rust-lang#144549) try-job: armhf-gnu r? `@RalfJung`
…ures, r=wesleywiser aarch64-nintendo-switch-freestanding - Enable CPU features that are always available in a live system (crypto instructions, plus explicit NEON). ~~While some NEON and crypto features may not be supported on the Nintendo Switch at boot (e.g. on the a53 cores) and this has not been tested, the features will _always_ be available if running as a sysmodule or homebrew application under Horizon/Atmosphere.~~ EDIT: the a53 cores are fused out, these features are always available. This has been tested with local tools personally, as well as building [emuiibo](https://github.com/XorTroll/emuiibo) as it uses both `sha` and `aes` primitives. This was tested using inline assembly in previous versions, and in current versions by using the `aes`, `ctr`, `hmac`, and `sha2` crates. r? `@jam1garner` This ended up being much delayed from our discussions about updating this. I tested a number of individual features such as the `aes` and `sha2` target-features directly to avoid a warning message with the `crypto` feature, but that appears to be caused by rust-lang#96472 and is not actually an issue. There is also a decision to make here about explicitly enabling the `neon` feature. I am in favor of it to be explicit, but it is not necessary as it is already enabled by the `v8a` and `crypto` features. I will defer to your decision as it does not change the actual instructions available for codegen.
…asper Add a method to dump MIR in the middle of MIR building This makes it easier to debug issues with MIR building by inserting dump_for_debugging calls around the suspected code responsible for the bad MIR.
…nicking, r=jhpratt Consolidate panicking functions in `slice/index.rs` Consolidate all the panicking functions in `slice/index.rs` to use a single `slice_index_fail` function, similar to how it is done in `str/traits.rs`. Split off from rust-lang#145024
…, r=davidtwco Refactor attribute parsing to improve ergonomics and some diagnostics
rustbot
added
A-testsuite
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@bors r+ rollup=never p=5 |
bors
added
S-waiting-on-bors
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☀️ Test successful - checks-actions |
What is this?This is an experimental post-merge analysis report that shows differences in test outcomes between the merged PR and its parent PR.Comparing 6ba0ce4 (parent) -> 8e3710e (this PR) Test differencesShow 40 test diffsStage 1
Stage 2
Additionally, 26 doctest diffs were found. These are ignored, as they are noisy. Job group index
Test dashboardRun cargo run --manifest-path src/ci/citool/Cargo.toml -- \
test-dashboard 8e3710ef31a0b2cdf5a1c2f3929b7735d1e28c20 --output-dir test-dashboardAnd then open Job duration changes
How to interpret the job duration changes?Job durations can vary a lot, based on the actual runner instance |
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📌 Perf builds for each rolled up PR:
previous master: 6ba0ce4094 In the case of a perf regression, run the following command for each PR you suspect might be the cause: |
This was referenced Aug 22, 2025
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Finished benchmarking commit (8e3710e): comparison URL. Overall result: ❌✅ regressions and improvements - please read the text belowOur benchmarks found a performance regression caused by this PR. Next Steps:
@rustbot label: +perf-regression Instruction countOur most reliable metric. Used to determine the overall result above. However, even this metric can be noisy.
Max RSS (memory usage)Results (primary 2.1%, secondary 0.6%)A less reliable metric. May be of interest, but not used to determine the overall result above.
CyclesResults (secondary 0.2%)A less reliable metric. May be of interest, but not used to determine the overall result above.
Binary sizeResults (primary -0.1%, secondary -0.1%)A less reliable metric. May be of interest, but not used to determine the overall result above.
Bootstrap: 471.281s -> 471.382s (0.02%) |
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Successful merges:
slice/index.rs#145137 (Consolidate panicking functions inslice/index.rs)IntoIteratorpredicate for query instability #145672 (Instantiate higher-ranked binder with erased when checkingIntoIteratorpredicate for query instability)panic_unwindto usecfg_select!#145689 (Migratepanic_unwindto usecfg_select!)ReEarlyParamintype_name. #145700 (HandleReEarlyParamintype_name.)ascast in prefetch codegen #145705 (remove anascast in prefetch codegen)r? @ghost
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