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@kokas-a kokas-a commented Oct 12, 2022

Add set of initial files for HS4XD SoC support. Based on HSDK sources.

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Some minor issues.

I'll check how this implementation maps to current DSP support for EM development - probably we can combine dsp implementations.

CONFIG_SOC_ARC_HS4XD=y
CONFIG_BOARD_HS4XD=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_XIP=y
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Any reason to have XIP enabled?

We don't have any XIP flash memory and we don't have XIP enabled for HSDK v1.

if SOC_ARC_HS4XD

config SOC
default "snps_arc_hs4xd"
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snps_arc_hs4xd -> snps_arc_hsdk4xd

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SoC based on HS4x core. "DK" as I understand means "Development Kit". Is it correct name SoC with "DK" abbreviation?

if BOARD_HS4XD

config BOARD
default "hs4xd"
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hs4xd -> hsdk4xd

@@ -0,0 +1,10 @@
# DesignWare ARC HS4XD Development Kit board configuration
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HS4XD -> HSDK4xD

# Copyright (c) 2022 Synopsys, Inc. All rights reserved.
# SPDX-License-Identifier: Apache-2.0

config BOARD_HS4XD
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BOARD_HS4XD -> BOARD_HSDK4XD

@@ -0,0 +1,39 @@
/*
* Copyright (c) 2019 Synopsys, Inc. All rights reserved.
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ditto

uint32_t core;
uint32_t i;

/* allocate all IDU interrupts to master core */
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master -> primary

Comment on lines 8 to 9
* This module provides routines to initialize and support soc-level hardware
* for the HS Development Kit
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Copypaste, please update board name

@@ -0,0 +1,8 @@
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
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ditto


/dts-v1/;

#include "hs4xd.dtsi"
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hs4xd.dtsi -> hsdk4xd.dtsi

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ruuddw commented Oct 13, 2022

Few questions:

  • Do we need a new CPU type for this? HS4x is already covered with the CPU_HS3X option. "If y, the SoC uses an ARC HS3x or HS4x CPU". There is no HS3XD either, it is simply configured by enabling 'DSP' for the HS3X
  • Do we need a new board? Is there a physical board for this, or is it another config of nsim/qemu?

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evgeniy-paltsev commented Oct 13, 2022

Hi @ruuddw,

Do we need a new CPU type for this? HS4x is already covered with the CPU_HS3X option. "If y, the SoC uses an ARC HS3x or HS4x CPU". There is no HS3XD either, it is simply configured by enabling 'DSP' for the HS3X

I'm not fully sure about this. The one meaningful part of having CPU_HS4X is to provide generic hs4x mcpu for all GNU toolchain targets (it's currently missing in this PR). However, as we have now possibility to tweak mcpu on SoC level - that might be a bit excessive :)

And yep, if we introduce new cpu it should be CPU_HS4X + DSP option enabled and not CPU_HS4XD as we have now.

Do we need a new board? Is there a physical board for this, or is it another config of nsim/qemu?

Yep, it's physical board.
See "ARC HS4x/HS4xD Development Kit" section on https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit page

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ruuddw commented Oct 13, 2022

I considered the HSDK a single board, but you're right there are two revisions. Doesn't the existing HSDK cover both revisions?
Still (I think I mentioned this at that time), using CPU_HS3x for either 3X or 4X is confusing, so I don't mind adding 4X explicitly. But let's be consistent on the "D" as option and not a main CPU.

@kokas-a kokas-a force-pushed the arc_qemu_hs4xd_separate branch from bfa37e8 to 280819c Compare April 10, 2023 07:00
@kokas-a kokas-a closed this May 12, 2023
@abrodkin
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@kokas-a care to add a reference to the upstream PR which implements it?

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kokas-a commented May 12, 2023

HS4XD support was added to upstream by PR zephyrproject-rtos#56683

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4 participants