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Introduces a new mcux lpspi shim driver to be used on the imxrt soc. This shim driver leverages heavily from the mcux dspi shim driver because the MCUXpresso SDK provides similar APIs for the lpspi and dspi peripherals. Signed-off-by: Maureen Helm <[email protected]>
Adds yaml bindings and dts nodes for the nxp lpspi peripheral. Signed-off-by: Maureen Helm <[email protected]>
Enables the mcux lpspi shim driver and subsystem clock for the imxrt soc. Signed-off-by: Maureen Helm <[email protected]>
Enables an instance of the lpspi peripheral, configures the pinmuxes, and updates the board documentation accordingly. Signed-off-by: Maureen Helm <[email protected]>
Adds a board-specific configuration for the mimxrt1050_evk to the spi_loopback test. Signed-off-by: Maureen Helm <[email protected]>
The spi project configuration was incorrectly enabling i2c, which causes a cmake failure if a board supports spi but not i2c. Found by CI when adding spi support to the mimxrt1050_evk board. Signed-off-by: Maureen Helm <[email protected]>
'use-prop-name' is not documented. Update dts/bindings/device_node.yaml.template to fix this. Document that 'type' attribute is not used. Fixes #9971 Signed-off-by: Erwan Gouriou <[email protected]>
The drivers/pinmux/dev directory doesn't containe any CMakeLists.txt file, preventing to enable the PINMUX_DEV option. Fix that by providing one. Signed-off-by: Aurelien Jarno <[email protected]>
New shell implementation is on the way. For now old one and all references are kept to be gradually replaced by new shell. Signed-off-by: Krzysztof Chruscinski <[email protected]>
New shell support features like: - multi-instance - command tree - static and dynamic commands - multiline - help print function - smart tab (autocompletion) - meta-keys - history, wildcards etc. - generic transport (initially, uart present) Signed-off-by: Jakub Rzeszutko <[email protected]> Signed-off-by: Krzysztof Chruscinski <[email protected]> Signed-off-by: Piotr Zięcik <[email protected]>
Ported shell sample to use new shell. Signed-off-by: Krzysztof Chruscinski <[email protected]>
Added function for peeking into previous item in the list. Signed-off-by: Krzysztof Chruscinski <[email protected]>
Extending shell with terminal-like history feature. Signed-off-by: Krzysztof Chruscinski <[email protected]>
Added optional shell commands: - clear - for clearing terminal - history - commands history - resize - terminal resize - shell - controling echo and colors Signed-off-by: Krzysztof Chruscinski <[email protected]> Signed-off-by: Jakub Rzeszutko <[email protected]>
Initial logger backend support added to shell. Signed-off-by: Krzysztof Chruscinski <[email protected]>
Added commands for getting current status and controlling which log messages are forwared to available backends. Signed-off-by: Krzysztof Chruscinski <[email protected]>
Library will be used by new shell implementation. Signed-off-by: Krzysztof Chruscinski <[email protected]> Signed-off-by: Jakub Rzeszutko <[email protected]>
Extended shell to support wildcard characters: * and ? and expand commands accordingly. Increased default stack size. Signed-off-by: Jakub Rzeszutko <[email protected]> Signed-off-by: Krzysztof Chruscinski <[email protected]>
This re-applies a patch that was merged in pr #6989, but then accidentally reverted in a bad merge conflict resolution in pr #6842. The actual behaviour of CONIG_FP_SOFTABI has not been matching the documenation. The Kconfig documentation states that floating point instructions should be generated, but this Kconfig option has been turning off floating point instructions instead. This commit causes floating point instructions to be generated when CONFIG_FP_SOFTABI is enabled, as was originally intended and documented. This commit can cause regressions if users have been relying on the actual behaviour instead of the documented behaviour. Kconfig documentation: config FP_SOFTABI help This option selects the Floating point ABI in which hardware floating point instructions are generated but soft-float calling conventions. GCC documentation: Specifying ‘soft’ causes GCC to generate output containing library calls for floating-point operations. ‘softfp’ allows the generation of code using hardware floating-point instructions, but still uses the soft-float calling conventions. ‘hard’ allows generation of floating-point instructions and uses FPU-specific calling conventions. Signed-off-by: Sebastian Bøe <[email protected]>
Add more features and re-order sections slightly. Signed-off-by: Anas Nashif <[email protected]>
There are currently three SoC variants for the UP Squared board: Pentium, Celeron and Atom. This adds a board option to specify for which variant is being built. Signed-off-by: Daniel Leung <[email protected]>
Sets the HPET timer frequency (enabled by default) to 19.2MHz. And also sets the local APIC timer frequencies according to the SoC variant. Signed-off-by: Daniel Leung <[email protected]>
There are GPIO controllers that can control more than 32 pins. The pin_mask is no longer adequate in this case. This wraps the pin_mask in a union together with a field named 'pin'. The driver is responsible for choosing whether to use pin_mask or pin. Signed-off-by: Daniel Leung <[email protected]>
This adds a driver for GPIO controller on the Intel Apollo Lake SoC. Origin: Original Signed-off-by: Daniel Leung <[email protected]>
This adds the necessary dts entires to enable GPIO controller on the UP Squared board. Signed-off-by: Daniel Leung <[email protected]>
This adds a sample app to utilize GPIOs on the UP Squared board. Origin: Original Signed-off-by: Daniel Leung <[email protected]>
The current method relies heavily on the linker/compiler to do the correct operation. Which is to eliminate the code that will never get called. This posses a problem if the build even changes by a smallest fraction. The current patch will enforce proper inclusion of the code at the pre-processing stage. Thereby not relying on the compiler/linker to do the right thing. Signed-off-by: Adithya Baglody <[email protected]>
Use the destination address to select the proper network interface when binding. The default network interface cannot be used here as then the packet might be sent to wrong network interface. Fixes #9935 Signed-off-by: Jukka Rissanen <[email protected]>
If user enables VLAN support, then the sample application will create two extra VLAN network interfaces for testing purposes. The application can be compiled like this for VLAN support: cmake -DBOARD=qemu_x86 -DOVERLAY_CONFIG=overlay-vlan.conf .. Signed-off-by: Jukka Rissanen <[email protected]>
Add support for VLANs which are disabled by default.
The application can be configured to use the VLANs by setting
the IP addresses properly in config file. The VLAN support in
this sample application is only meant for testing multiple network
interface handling.
The application can be compiled like this for VLAN support:
cmake -DBOARD=qemu_x86 -DOVERLAY_CONFIG=overlay-vlan.conf ..
Signed-off-by: Jukka Rissanen <[email protected]>
Select the Low Power States supported by Quark_SE_C1000_SS SoC series. Signed-off-by: Ramakrishna Pallala <[email protected]>
Select the Low Power States supported by Intel Quark SE SoC series. Signed-off-by: Ramakrishna Pallala <[email protected]>
Pull in a more recent version of libmetal, motivated by the void pointer fixes in efc33fe. libmetal's b4b5bea to a4f7630 spans: a4f7630 linux: device: fix max chars to copy for the dev name 10a0d5b lib: system: freertos: mutex: change to use atomic_int ... 4e670c5 ci: Zephyr env var for toolchain 3bef6f0 cmake: Fix Zephyr library integration 13158c3 compiler: add IAR compiler file 0820a2e microblaze: suppress io 64-bit R/W access if 64 bit atomic ... e2e5608 io: suppress io 64 bit R/W access if 64 bit atomic not ... efc33fe io: fix compilation error for void pointers. 32ad1d2 cache: fix compilation issue c1ade0d travis CI: update Zephyr SDK version to 0.9.3 c49d7cd travis CI: updated arm compiler ubuntu package d279a6a travis ci: Update FreeRTOS download path 5c70105 irq: update sys_irq_restore_enable and sys_irq_save_disable 05f0cd4 cmake: Only look for doxygen package if docs enabled b4b5bea zephyr: Introduce WITH_ZEPHYR_LIB option At current time of writing, libmetal's HEAD is 5bc2106641. However this failed to build in their Travis CI. The latest passing commit is a4f7630. Signed-off-by: Mark Ruvald Pedersen <[email protected]>
Under GNU C, sizeof(void) = 1. This commit simply uses uint8_t. Pointer arithmetics over void types is: * A GNU C extension * Not supported by Clang * Illegal across all ISO C standards See also: https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html Signed-off-by: Mark Ruvald Pedersen <[email protected]>
Under GNU C, sizeof(void) = 1. This commit merely makes it explicit u8. Pointer arithmetics over void types is: * A GNU C extension * Not supported by Clang * Illegal across all ISO C standards See also: https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html Signed-off-by: Mark Ruvald Pedersen <[email protected]>
Ensure future commits do not re-introduce use of this GNU C extension. Signed-off-by: Mark Ruvald Pedersen <[email protected]>
This commit touches the C codebase and the python syscall generator. The Z_GENLIST-macros expand to whole functions. Once expanded by the preprocessor we notice a semicolon is put after the function body. But ISO C99 does not allow extra ‘;’ outside of a function. Though this is accepted by GCC with GNU extensions, it is not by Clang. Signed-off-by: Mark Ruvald Pedersen <[email protected]>
Macro _OBJECT_TRACING_NEXT_PTR expands to a member or to nothing.
Macro _OBJECT_TRACING_NEXT_PTR is used in a number of places, like:
struct k_stack {
.. omitted ..
_OBJECT_TRACING_NEXT_PTR(k_stack);
u8_t flags;
};
When the macro expands to nothing, a lonesome semi would remain. This is
illegal in C99, but permitted in GCC with GNU extensions.
Rather than expand to empty, we now expand to a zero-length array.
This means we can retain the trailing semis across structs wherein the
macro is used.
Note that zero-length array (foo[0]) != flexible array member (foo[]):
* zero-length array: Is GNU+Clang extension. Anywhere in struct.
* flexible array member: Is C99. Only in end of struct.
Thus we have really only traded-off one portability issue for
another, more acceptable, one at least.
Signed-off-by: Mark Ruvald Pedersen <[email protected]>
According C99 the first 31 characters of an identifier must be unique. Shortening the namespace of the generated objects to achieve it. C99 - 5.2.4.1 MISRA-C rule 5.1 Signed-off-by: Flavio Ceolin <[email protected]>
When delta_ticks_from_prev is not 0, the variable ticks will necessarily be lesser or equal 0, so the if checking that is no necessary. MISRA-C rule 15.7 Signed-off-by: Flavio Ceolin <[email protected]>
A final else statement must be provided when an if statement is followed by one or more else if. MISRA-C rule 15.7 Signed-off-by: Flavio Ceolin <[email protected]>
_INIT_LEVEL_P* variables are not used anywhere. These values are duplicated in defines like _SYS_INIT_LEVEL_P*, just removing it. MISRA-C rule 2.2 Signed-off-by: Flavio Ceolin <[email protected]>
According with ISO/IEC 9899:1999 §6.7 Declarations, typedefs name must be uniques. C99 clause 6.7 MISRA-C rule 1.1 Signed-off-by: Flavio Ceolin <[email protected]>
MISRA-C requires that all declarations of a specific function, or object, use the same names and type qualifiers. MISRA-C rule 8.3 Signed-off-by: Flavio Ceolin <[email protected]>
Removing an unnecessary check in k_mem_pool_alloc. The condition is already being checked in the if. MISRA-C rule 14.3 Signed-off-by: Flavio Ceolin <[email protected]>
Any calculation based on linker variables shouldn't be inside sections. Also added the linker macro needed for the shared memory. Signed-off-by: Adithya Baglody <[email protected]>
The linker script is updated to support the new method of size calculation. Signed-off-by: Adithya Baglody <[email protected]>
In coap_option_value_to_int function, when coap option length is 4, option->value[3] should be shifted by 0 rather than option->value[2]. This doesn't affect the behavior of function but needs to be fixed. In coap_append_option_int function, when the value is between 0xffff and 0xffffff(when option length is 3), bit shift operation is wrong. For example, if the value is 0xABCDEF, by sys_put_be16(val, data) data[0]=0xCD, data[1]=0xEF, by val >> 16, data[2]=0xAB. So the result becomes 0xCDEFAB not 0xABCDEF. So, to sys_put_be16 function hand &data[1] over instead of handing data over and val >> 16 needs to be set to data[0], not data[2]. Signed-off-by: Taehwa Kang <[email protected]>
Starting with glibc 2.20, there is warning when _BSD_SOURCE is defined but not _DEFAULT_SOURCE (in /usr/include/features.h around line 184). Sanitycheck turns this warning into error. So define _DEFAULT_SOURCE at build time for native. Signed-off-by: Daniel Leung <[email protected]>
vonhust
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Jan 10, 2019
This patch fixes the following issues: CID 190622 (#1 of 1): Out-of-bounds access (OVERRUN) CID 190632 (#1 of 1): Out-of-bounds access (OVERRUN) CID 190623 (#1 of 1): Unchecked return value (CHECKED_RETURN) CID 190628 (#1 of 1): Out-of-bounds write (OVERRUN) CID 190620 (#1 of 1): Dereference after null check (FORWARD_NULL) Signed-off-by: Loic Poulain <[email protected]>
vonhust
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Jun 27, 2019
Currently, the free block bitmap is roughly 4 times larger than it needs to, wasting memory. Let's assume maxsz = 128, minsz = 8 and n_max = 40. Z_MPOOL_LVLS(128, 8) returns 3. The block size for level #0 is 128, the block size for level #1 is 128/4 = 32, and the block size for level #2 is 32/4 = 8. Hence levels 0, 1, and 2 for a total of 3 levels. So far so good. Now let's look at Z_MPOOL_LBIT_WORDS(). We get: Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 0) = ((40 << 0) + 31) / 32 = 2 Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 1) = ((40 << 2) + 31) / 32 = 5 Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 2) = ((40 << 4) + 31) / 32 = 20 None of those are < 2 so Z_MPOOL_LBIT_WORDS() takes the results from Z_MPOOL_LBIT_WORDS_UNCLAMPED(). Finally, let's look at _MPOOL_BITS_SIZE(. It sums all possible levels with Z_MPOOL_LBIT_BYTES() which is: #define Z_MPOOL_LBIT_BYTES(maxsz, minsz, l, n_max) \ (Z_MPOOL_LVLS((maxsz), (minsz)) >= (l) ? \ 4 * Z_MPOOL_LBIT_WORDS((n_max), l) : 0) Or given what we already have: Z_MPOOL_LBIT_BYTES(128, 8, 0, 40) = (3 >= 0) ? 4 * 2 : 0 = 8 Z_MPOOL_LBIT_BYTES(128, 8, 1, 40) = (3 >= 1) ? 4 * 5 : 0 = 20 Z_MPOOL_LBIT_BYTES(128, 8, 2, 40) = (3 >= 2) ? 4 * 20 : 0 = 80 Z_MPOOL_LBIT_BYTES(128, 8, 3, 40) = (3 >= 3) ? 4 * ?? Wait... we're missing this one: Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 3) = ((40 << 6) + 31) / 32 = 80 then: Z_MPOOL_LBIT_BYTES(128, 8, 3, 40) = (3 >= 3) ? 4 * 80 : 0 = 320 Further levels yeld (3 >= 4), (3 >= 5), etc. so they're all false and produce 0. So this means that we're statically allocating 428 bytes to the bitmap when clearly only the first 3 Z_MPOOL_LBIT_BYTES() results for the corresponding 3 levels that we have should be summed e.g. only 108 bytes. Here the code logic gets confused between level numbers and the number levels, hence the extra allocation which happens to be exponential. Signed-off-by: Nicolas Pitre <[email protected]>
vonhust
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Apr 18, 2020
Fix two issues: 1. The script assumes the default CMake generator build tool platform is installed. On Linux at least, that's Make instead of Ninja, but Make might not be installed since Zephyr recommends Ninja. On Windows, that might be VS Code or nmake. Calling `cmake -P pristine` instead of `cmake --build <path> --target pristine` has the benefit of removing the dependency on a build command, and hence the default generator is not relevant. 2. It also assumes run_cmake() returns control, and therefore pristine can be run. However, if the cmake command fails hard (say, due to issue #1 before this patch), run_cmake() throws an exception instead. Fix that by trying to run the pristine target in a finally block instead, and adding some manual cleanup steps in case the build system is in a bad state and pristine fails too. Signed-off-by: Martí Bolívar <[email protected]> Signed-off-by: Torsten Rasmussen <[email protected]>
abrodkin
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Apr 24, 2020
Implement deep sleep mode #1 using the shutdown state on the CC13x2/CC26x2. Signed-off-by: Vincent Wan <[email protected]>
vonhust
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Jun 29, 2020
This makes the gatt metrics also available for gatt write-without-rsp-cb so it now prints the rate of each write: uart:~$ gatt write-without-response-cb 1e ff 10 10 Write #1: 16 bytes (0 bps) Write #2: 32 bytes (3445948416 bps) Write #3: 48 bytes (2596929536 bps) Write #4: 64 bytes (6400 bps) Write #5: 80 bytes (8533 bps) Write #6: 96 bytes (10666 bps) Write #7: 112 bytes (8533 bps) Write #8: 128 bytes (9955 bps) Write zephyrproject-rtos#9: 144 bytes (11377 bps) Write zephyrproject-rtos#10: 160 bytes (7680 bps) Write zephyrproject-rtos#11: 176 bytes (8533 bps) Write zephyrproject-rtos#12: 192 bytes (9386 bps) Write Complete (err 0) Write zephyrproject-rtos#13: 208 bytes (8533 bps) Write zephyrproject-rtos#14: 224 bytes (9244 bps) Write zephyrproject-rtos#15: 240 bytes (9955 bps) Write zephyrproject-rtos#16: 256 bytes (8000 bps) Signed-off-by: Luiz Augusto von Dentz <[email protected]>
IRISZZW
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Nov 19, 2020
The _ldiv5() is an optimized divide-by-5 function that is smaller and
faster than the generic libgcc implementation.
Yet it can be made even smaller and faster with this replacement
implementation based on a reciprocal multiplication plus some tricks.
For example, here's the assembly from the original code on ARM:
_ldiv5:
ldr r3, [r0]
movw ip, zephyrproject-rtos#52429
ldr r1, [r0, #4]
movt ip, 52428
adds r3, r3, #2
push {r4, r5, r6, r7, lr}
mov lr, #0
adc r1, r1, lr
adds r2, lr, lr
umull r7, r6, ip, r1
lsr r6, r6, #2
adc r7, r6, r6
adds r2, r2, r2
adc r7, r7, r7
adds r2, r2, lr
adc r7, r7, r6
subs r3, r3, r2
sbc r7, r1, r7
lsr r2, r3, #3
orr r2, r2, r7, lsl zephyrproject-rtos#29
umull r2, r1, ip, r2
lsr r2, r1, #2
lsr r7, r1, zephyrproject-rtos#31
lsl r1, r2, #3
adds r4, lr, r1
adc r5, r6, r7
adds r2, r1, r1
adds r2, r2, r2
adds r2, r2, r1
subs r2, r3, r2
umull r3, r2, ip, r2
lsr r2, r2, #2
adds r4, r4, r2
adc r5, r5, #0
strd r4, [r0]
pop {r4, r5, r6, r7, pc}
And here's the resulting assembly with this commit applied:
_ldiv5:
push {r4, r5, r6, r7}
movw r4, zephyrproject-rtos#13107
ldr r6, [r0]
movt r4, 13107
ldr r1, [r0, #4]
mov r3, #0
umull r6, r7, r6, r4
add r2, r4, r4, lsl #1
umull r4, r5, r1, r4
adds r1, r6, r2
adc r2, r7, r2
adds ip, r6, r4
adc r1, r7, r5
adds r2, ip, r2
adc r2, r1, r3
adds r2, r4, r2
adc r3, r5, r3
strd r2, [r0]
pop {r4, r5, r6, r7}
bx lr
So we're down to 20 instructions from 36 initially, with only 2 umull
instructions instead of 3, and slightly smaller stack footprint.
Signed-off-by: Nicolas Pitre <[email protected]>
IRISZZW
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Mar 31, 2021
The fatal log now contains - Trap type in human readable representation - Integer registers visible to the program when trap was taken - Special register values such as PC and PSR - Backtrace with PC and SP If CONFIG_EXTRA_EXCEPTION_INFO is enabled, then all the above is logged. If not, only the special registers are logged. The format is inspired by the GRMON debug monitor and TSIM simulator. A quick guide on how to use the values is in fatal.c. It now looks like this: E: tt = 0x02, illegal_instruction E: E: INS LOCALS OUTS GLOBALS E: 0: 00000000 f3900fc0 40007c50 00000000 E: 1: 00000000 40004bf0 40008d30 40008c00 E: 2: 00000000 40004bf4 40008000 00000003 E: 3: 40009158 00000000 40009000 00000002 E: 4: 40008fa8 40003c00 40008fa8 00000008 E: 5: 40009000 f3400fc0 00000000 00000080 E: 6: 4000a1f8 40000050 4000a190 00000000 E: 7: 40002308 00000000 40001fb8 000000c1 E: E: psr: f30000c7 wim: 00000008 tbr: 40000020 y: 00000000 E: pc: 4000a1f4 npc: 4000a1f8 E: E: pc sp E: #0 4000a1f4 4000a190 E: #1 40002308 4000a1f8 E: #2 40003b24 4000a258 Signed-off-by: Martin Åberg <[email protected]>
AFOliveira
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Jul 9, 2025
Add possibility to perform crop on all pipes and compose (downscale) on pixel pipes (endpoint #1 and endpoint #2). Rework the code in order to move the downscale control from the set_fmt into the set_selection (compose). Signed-off-by: Alain Volmat <[email protected]>
M-Moawad
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Sep 14, 2025
Add support for NV12/NV21, NV16/NV61 and YUV420/YVU420 (semi)planar formats which can be output by the main #1 pipe. Signed-off-by: Alain Volmat <[email protected]>
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