Ensure zroSimd12Elm3 is explicitly nulled out #85625
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ghost
added
the
area-CodeGen-coreclr
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue DetailsNot doing this meant you could get non-determinstic bits in some scenarios, leading to sporadic failure
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tannergooding
commented
May 2, 2023
| zroSimd12Elm3 = GetEmitter()->emitSimd16Const(constValue); | ||
| } | ||
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| GetEmitter()->emitIns_SIMD_R_R_C(INS_andpd, EA_16BYTE, tgtReg, tgtReg, zroSimd12Elm3, 0); |
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andpd vs andps doesn't matter, but it should've been andps since that's "more correct" for TYP_SIMD12 (e.g. Vector3 where all fields are float).
jakobbotsch
approved these changes
May 2, 2023
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Not doing this meant you could get non-determinstic bits in some scenarios, leading to sporadic failure