[release/9.0] JIT ARM64-SVE: Backport "Avoid combining conditional select for reduction instrinsics" (#107207)

[amanasifkhalid]

Backport of #107207 to release/9.0

/cc @kunalspathak @SwapnilGaikwad

Customer Impact

• Customer reported
• Found internally

For ARM SVE reduction intrinsics, or intrinsics that produce a scalar value, we currently do not support merging ConditionalSelect uses into the intrinsic itself as a mask operation. So for patterns like Sve.AddAcross(Sve.ConditionalSelect(mask, vec, zero)), we only support emitting a SEL to first select the correct entries in the vector, and then passing this vector to AddAcross; #101973 tracks merging these two instructions into one for .NET 10.

When trying to merge ConditionalSelect operands of other intrinsics, the JIT did not skip this optimization for reduction intrinsics, breaking various invariants. This change ensures the JIT will not try to merge ConditionalSelect into reduction intrinsics, and adds relevant tests.

Regression

• Yes
• No

This was introduced with SVE support, which is new in .NET 9.

Testing

Added regression tests, and expanded existing SVE testing to cover more ConditionalSelect cases.

Risk

Low. This is specific to SVE support, which is experimental in .NET 9.

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[amanasifkhalid]

@kunalspathak PTAL, I had to open this manually due to merge conflicts around the ordering of HW_Flags in hwintrinsic.h. Also, since #107581 was backported before this one, lowerarmarch.cpp had trivial merge conflicts.

[kunalspathak]

LGTM. Thanks!

[jeffschwMSFT]

approved. we can merge when ready

[amanasifkhalid]

@jeffschwMSFT could you merge this when you have a moment, please? #107725 needs to be merged on top of this PR. Thanks!