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Merged
merged 3 commits into from
Apr 28, 2025
Merged

mcuboot: build MCUboot Espressif Port with Zephyr sysbuild #424

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fde6c83
esp32c3: remove unnecessary sources related to bootloader build
almir-okato Mar 24, 2025
2f656f0
bootloader_support: restore files to IDF 5.1.x version
almir-okato Mar 24, 2025
415a2d6
mcuboot: build MCUboot Espressif Port with Zephyr sysbuild
almir-okato Mar 26, 2025
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1 change: 0 additions & 1 deletion components/bootloader_support/src/bootloader_console_loader.c
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,6 @@
#include "esp32s3/rom/usb/cdc_acm.h"
#include "esp32s3/rom/usb/usb_persist.h"
#endif
#include "stubs.h"

#ifdef CONFIG_ESP_CONSOLE_USB_CDC
/* The following functions replace esp_rom_uart_putc, esp_rom_uart_tx_one_char,
Expand Down
29 changes: 10 additions & 19 deletions components/bootloader_support/src/esp32/bootloader_esp32.c
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Expand Up @@ -36,11 +36,10 @@
#include "esp_rom_sys.h"
#include "esp_rom_spiflash.h"
#include "esp_efuse.h"
#include "esp_flash_internal.h"

static const char *TAG = "boot.esp32";

#if !CONFIG_APP_BUILD_TYPE_RAM
#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
static void bootloader_reset_mmu(void)
{
/* completely reset MMU in case serial bootloader was running */
Expand Down Expand Up @@ -180,15 +179,13 @@ esp_err_t bootloader_init(void)
{
assert(&_bss_start <= &_bss_end);
assert(&_data_start <= &_data_end);
// int *sp = esp_cpu_get_sp();
// assert((unsigned*)sp < (unsigned*)&_bss_start);
// assert((unsigned*)sp < (unsigned*)&_data_start);
int *sp = esp_cpu_get_sp();
assert(sp < &_bss_start);
assert(sp < &_data_start);
}
#endif
#ifndef __ZEPHYR__
// clear bss section
bootloader_clear_bss_section();
#endif
#endif // !CONFIG_APP_BUILD_TYPE_RAM

// init eFuse virtual mode (read eFuses to RAM)
Expand All @@ -197,7 +194,7 @@ esp_err_t bootloader_init(void)
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
esp_efuse_init_virtual_mode_in_ram();
#endif
#endif /* CONFIG_EFUSE_VIRTUAL */
#endif
// bootst up vddsdio
bootloader_common_vddsdio_configure();
// check rated CPU clock
Expand All @@ -208,17 +205,10 @@ esp_err_t bootloader_init(void)
bootloader_clock_configure();
// initialize uart console, from now on, we can use esp_log
bootloader_console_init();
// print 2nd bootloader banner
/* print 2nd bootloader banner */
bootloader_print_banner();

#ifndef CONFIG_BOOTLOADER_MCUBOOT
spi_flash_init_chip_state();
if ((ret = esp_flash_init_default_chip()) != ESP_OK) {
return ret;
}
#endif

#if !CONFIG_APP_BUILD_TYPE_RAM
#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
// reset MMU
bootloader_reset_mmu();
// update flash ID
Expand All @@ -228,6 +218,7 @@ esp_err_t bootloader_init(void)
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
return ret;
}
#if !CONFIG_APP_BUILD_TYPE_RAM
// read bootloader header
if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
return ret;
Expand All @@ -236,18 +227,18 @@ esp_err_t bootloader_init(void)
if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
return ret;
}
#endif // #if !CONFIG_APP_BUILD_TYPE_RAM
// initialize spi flash
if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
return ret;
}
#endif // #if !CONFIG_APP_BUILD_TYPE_RAM
#endif //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP

// check whether a WDT reset happend
bootloader_check_wdt_reset();
// config WDT
bootloader_config_wdt();
// enable RNG early entropy source
bootloader_enable_random();

return ret;
}
24 changes: 2 additions & 22 deletions components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
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Original file line number Diff line number Diff line change
Expand Up @@ -39,9 +39,6 @@
#include "esp_efuse.h"
#include "hal/mmu_hal.h"
#include "hal/cache_hal.h"
#if !defined(CONFIG_BOOTLOADER_MCUBOOT)
#include "esp_flash_internal.h"
#endif

static const char *TAG = "boot.esp32c2";

Expand All @@ -65,7 +62,7 @@ static void bootloader_check_wdt_reset(void)
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 ||
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
wdt_rst = 1;
}
if (wdt_rst) {
Expand Down Expand Up @@ -104,15 +101,13 @@ esp_err_t bootloader_init(void)
/* check that static RAM is after the stack */
assert(&_bss_start <= &_bss_end);
assert(&_data_start <= &_data_end);
#ifndef __ZEPHYR__
// clear bss section
bootloader_clear_bss_section();
#endif
#endif // !CONFIG_APP_BUILD_TYPE_RAM

// init eFuse virtual mode (read eFuses to RAM)
#ifdef CONFIG_EFUSE_VIRTUAL
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
esp_efuse_init_virtual_mode_in_ram();
#endif
Expand All @@ -124,40 +119,25 @@ esp_err_t bootloader_init(void)
/* print 2nd bootloader banner */
bootloader_print_banner();

#ifndef CONFIG_BOOTLOADER_MCUBOOT
spi_flash_init_chip_state();
if ((ret = esp_flash_init_default_chip()) != ESP_OK) {
return ret;
}
#endif

#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
//init cache hal
cache_hal_init();
//init mmu
mmu_hal_init();
// update flash ID
bootloader_flash_update_id();
// Check and run XMC startup flow
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
return ret;
}
#if !CONFIG_APP_BUILD_TYPE_RAM
// read bootloader header
if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed to read flash!");
return ret;
}
// read chip revision and check if it's compatible to bootloader
if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed to vallidate!");
return ret;
}
#endif // !CONFIG_APP_BUILD_TYPE_RAM
// initialize spi flash
if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed to init spi flash!");
return ret;
}
#endif //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
Expand Down
21 changes: 3 additions & 18 deletions components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
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Original file line number Diff line number Diff line change
Expand Up @@ -44,9 +44,6 @@
#include "hal/mmu_hal.h"
#include "hal/cache_hal.h"
#include "hal/efuse_hal.h"
#if !defined(CONFIG_BOOTLOADER_MCUBOOT)
#include "esp_flash_internal.h"
#endif

static const char *TAG = "boot.esp32c3";

Expand All @@ -70,7 +67,7 @@ static void bootloader_check_wdt_reset(void)
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
wdt_rst = 1;
}
if (wdt_rst) {
Expand Down Expand Up @@ -143,15 +140,13 @@ esp_err_t bootloader_init(void)
/* check that static RAM is after the stack */
assert(&_bss_start <= &_bss_end);
assert(&_data_start <= &_data_end);
#ifndef __ZEPHYR__
// clear bss section
bootloader_clear_bss_section();
#endif
#endif // !CONFIG_APP_BUILD_TYPE_RAM

// init eFuse virtual mode (read eFuses to RAM)
#ifdef CONFIG_EFUSE_VIRTUAL
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
esp_efuse_init_virtual_mode_in_ram();
#endif
Expand All @@ -163,13 +158,6 @@ esp_err_t bootloader_init(void)
/* print 2nd bootloader banner */
bootloader_print_banner();

#ifndef CONFIG_BOOTLOADER_MCUBOOT
spi_flash_init_chip_state();
if ((ret = esp_flash_init_default_chip()) != ESP_OK) {
return ret;
}
#endif

#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
//init cache hal
cache_hal_init();
Expand All @@ -179,24 +167,21 @@ esp_err_t bootloader_init(void)
bootloader_flash_update_id();
// Check and run XMC startup flow
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
return ret;
}
#if !CONFIG_APP_BUILD_TYPE_RAM
// read bootloader header
if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed to read flash!");
return ret;
}
// read chip revision and check if it's compatible to bootloader
if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed to vallidate!");
return ret;
}
#endif //#if !CONFIG_APP_BUILD_TYPE_RAM
// initialize spi flash
if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed to init spi flash!");
return ret;
}
#endif // !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
Expand Down
12 changes: 1 addition & 11 deletions components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
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Original file line number Diff line number Diff line change
Expand Up @@ -45,9 +45,6 @@
#include "soc/lp_wdt_reg.h"
#include "hal/efuse_hal.h"
#include "modem/modem_lpcon_reg.h"
#if !defined(CONFIG_BOOTLOADER_MCUBOOT)
#include "esp_flash_internal.h"
#endif

static const char *TAG = "boot.esp32c6";

Expand All @@ -71,7 +68,7 @@ static void bootloader_check_wdt_reset(void)
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
wdt_rst = 1;
}
if (wdt_rst) {
Expand Down Expand Up @@ -145,13 +142,6 @@ esp_err_t bootloader_init(void)
/* print 2nd bootloader banner */
bootloader_print_banner();

#ifndef CONFIG_BOOTLOADER_MCUBOOT
spi_flash_init_chip_state();
if ((ret = esp_flash_init_default_chip()) != ESP_OK) {
return ret;
}
#endif

#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
//init cache hal
cache_hal_init();
Expand Down
43 changes: 14 additions & 29 deletions components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
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Original file line number Diff line number Diff line change
Expand Up @@ -38,9 +38,6 @@
#include "esp_efuse.h"
#include "hal/mmu_hal.h"
#include "hal/cache_hal.h"
#if !defined(CONFIG_BOOTLOADER_MCUBOOT)
#include "esp_flash_internal.h"
#endif

static const char *TAG = "boot.esp32s2";

Expand All @@ -54,8 +51,6 @@ static void wdt_reset_cpu0_info_enable(void)

static void wdt_reset_info_dump(int cpu)
{
/* FIXME: failing EDT test due to error in early log */
#if 0
uint32_t inst = 0, pid = 0, stat = 0, data = 0, pc = 0,
lsstat = 0, lsaddr = 0, lsdata = 0, dstat = 0;
const char *cpu_name = cpu ? "APP" : "PRO";
Expand All @@ -72,20 +67,19 @@ static void wdt_reset_info_dump(int cpu)

if (DPORT_RECORD_PDEBUGINST_SZ(inst) == 0 &&
DPORT_RECORD_PDEBUGSTATUS_BBCAUSE(dstat) == DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI) {
ESP_EARLY_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32" (waiti mode)", cpu_name, pc);
ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32" (waiti mode)", cpu_name, pc);
} else {
ESP_EARLY_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32, cpu_name, pc);
ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32, cpu_name, pc);
}
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
#endif
ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
ESP_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
}

static void bootloader_check_wdt_reset(void)
Expand All @@ -94,7 +88,7 @@ static void bootloader_check_wdt_reset(void)
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
// PRO CPU has been reset by WDT
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
wdt_rst = 1;
}
if (wdt_rst) {
Expand Down Expand Up @@ -126,15 +120,13 @@ esp_err_t bootloader_init(void)
assert(&_data_start <= &_data_end);
}
#endif
#ifndef __ZEPHYR__
// clear bss section
bootloader_clear_bss_section();
#endif /* __ZEPHYR__ */
#endif // !CONFIG_APP_BUILD_TYPE_RAM

// init eFuse virtual mode (read eFuses to RAM)
#ifdef CONFIG_EFUSE_VIRTUAL
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
esp_efuse_init_virtual_mode_in_ram();
#endif
Expand All @@ -147,13 +139,6 @@ esp_err_t bootloader_init(void)
/* print 2nd bootloader banner */
bootloader_print_banner();

#ifndef CONFIG_BOOTLOADER_MCUBOOT
spi_flash_init_chip_state();
if ((ret = esp_flash_init_default_chip()) != ESP_OK) {
return ret;
}
#endif

#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
// init cache hal
cache_hal_init();
Expand All @@ -165,7 +150,7 @@ esp_err_t bootloader_init(void)
bootloader_flash_update_id();
// Check and run XMC startup flow
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
return ret;
}
#if !CONFIG_APP_BUILD_TYPE_RAM
Expand Down
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