rustc_codegen_ssa: More comprehensive RISC-V ELF flags

[a4lg]

This change implements more conformant, more comprehensive RISC-V ELF flags handling when generating certain object files directly from rustc.

• Use "zca" instead of "c"
  The "Zca" extension (a subset of "C") is the minimal configuration for compressed instructions to set EF_RISCV_RVC flag.
• Set TSO flag from "ztso"
  The "Ztso" extension denotes that the program depends on the RVTSO (Total Store Ordering) memory consistency model, which is stronger than the standard RVWMO (Weak Memory Ordering) consistency model and on ELF targets, we need to set EF_RISCV_TSO flag.

@rustbot label +O-riscv

[rustbot]

r? @lcnr

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[rustbot]

Some changes occurred in compiler/rustc_codegen_ssa

cc @WaffleLapkin

[WaffleLapkin]

Is zca implied by c? i.e. does this preserve the behavior for code that has been using c?

[WaffleLapkin]

And are these elf flags documented anywhere? (I would like to learn more about the context here)

[a4lg]

Is zca implied by c? i.e. does this preserve the behavior for code that has been using c?

Yes. I tested so that targets only with c enables EF_RISCV_RVC (suggesting zca is implied by c).

And from compiler/rustc_target/src/target_features.rs:

    ("c", Stable, &["zca"]),

Let me give some time to answer your second question.

[a4lg]

@WaffleLapkin

And are these elf flags documented anywhere? (I would like to learn more about the context here)

I think following quotes from two documents should be sufficient (as a supplement, I show that EF_RISCV_TSO is indeed set if the Ztso extension is enabled in both GNU/LLVM toolchains).

RISC-V ELF Specification

EF_RISCV_TSO (0x0010)
This bit is set when the binary requires the RVTSO memory consistency model.

RISC-V ISA Manual (version 20240411)

Chapter 18. "Ztso" Extension for Total Store Ordering, Version 1.0

This chapter defines the "Ztso" extension for the RISC-V Total Store Ordering (RVTSO) memory consistency model.

and (bold range is marked by me):

In spite of the fact that Ztso adds no new instructions to the ISA, code written assuming RVTSO will not run correctly on implementations not supporting Ztso.
Binaries compiled to run only under Ztso should indicate as such via a flag in the binary, so that platforms which do not implement Ztso can simply refuse to run them.

GNU Binutils

I show EF_RISCV_TSO is set when the Ztso extension is enabled.

gas/config/tc-riscv.c: riscv_set_arch

  if (riscv_subset_supports (&riscv_rps_as, "ztso"))
    riscv_set_tso ();

gas/config/tc-riscv.c: riscv_set_tso

static void
riscv_set_tso (void)
{
  elf_flags |= EF_RISCV_TSO;
}

LLVM

I show EF_RISCV_TSO is set when the Ztso extension is enabled and indirectly show EF_RISCV_RVC is set when the Zca extension is enabled.

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp: RISCVTargetELFStreamer::finish()

  if (hasTSO())
    EFlags |= ELF::EF_RISCV_TSO;

llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h: RISCVTargetStreamer::hasTSO()

  bool hasTSO() const { return HasTSO; }

llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp: RISCVTargetStreamer::setFlagsFromFeatures(const MCSubtargetInfo&)

void RISCVTargetStreamer::setFlagsFromFeatures(const MCSubtargetInfo &STI) {
  HasRVC = STI.hasFeature(RISCV::FeatureStdExtZca);
  HasTSO = STI.hasFeature(RISCV::FeatureStdExtZtso);
}

[rustbot]

This PR was rebased onto a different master commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

[a4lg]

Made a rebase along with a few commit message fixes (no code changes).

[a4lg]

For instance, this change affects ELF flags of lib.rmeta when a crate is built as an rlib.

// src/lib.rs
// (no_core empty library to generate lib.rmeta in minimum effort (without adding targets to compile))
#![feature(no_core)]
#![no_core]

# Cargo.toml
[package]
name = "test"
version = "0.0.0"
edition = "2024"

[lib]
crate-type = ["rlib"]

cargo clean
# Test TSO flag
RUSTFLAGS='-Ctarget-feature=+ztso' cargo build --target riscv32imafc-unknown-none-elf
# # Test RVC flag
# RUSTFLAGS='-Ctarget-feature=+zca' cargo build --target riscv32ima-unknown-none-elf
# Extract `lib*.rlib` on the target directory (removing temporary `*.o`).
rm *.o; ar x target/riscv32*-unknown-none-elf/debug/libtest.rlib

Before this PR

$ readelf -h *.o
...
  Flags:                             0x13, RVC, TSO, single-float ABI
...
$ readelf -h lib.rmeta
...
  # Flags not matching with *.o (emitted by LLVM)
  Flags:                             0x3, RVC, single-float ABI
...

After this PR

$ readelf -h *.o
...
  Flags:                             0x13, RVC, TSO, single-float ABI
...
$ readelf -h lib.rmeta
...
  # Flags match with *.o (emitted by LLVM)
  Flags:                             0x13, RVC, TSO, single-float ABI
...

[lcnr]

r? @WaffleLapkin maybe :3

[rustbot]

WaffleLapkin is not on the review rotation at the moment.
They may take a while to respond.

[WaffleLapkin]

@a4lg thanks for extensive references (and the PR)!

View changes since this review

[WaffleLapkin]

@bors r+ rollup

[bors]

📌 Commit cb8c905 has been approved by WaffleLapkin

It is now in the queue for this repository.