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2 changes: 1 addition & 1 deletion compiler/rustc_target/src/spec/riscv32imac_esp_espidf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ pub fn target() -> Target {

// As RiscV32IMAC architecture does natively support atomics,
// automatically enable the support for the Rust STD library.
max_atomic_width: Some(64),
max_atomic_width: Some(32),
atomic_cas: true,

features: "+m,+a,+c".into(),
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4 changes: 2 additions & 2 deletions compiler/rustc_target/src/spec/riscv32imc_esp_espidf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,11 +16,11 @@ pub fn target() -> Target {
cpu: "generic-rv32".into(),

// While the RiscV32IMC architecture does not natively support atomics, ESP-IDF does support
// the __atomic* and __sync* GCC builtins, so setting `max_atomic_width` to `Some(64)`
// the __atomic* and __sync* GCC builtins, so setting `max_atomic_width` to `Some(32)`
// and `atomic_cas` to `true` will cause the compiler to emit libcalls to these builtins.
//
// Support for atomics is necessary for the Rust STD library, which is supported by the ESP-IDF framework.
max_atomic_width: Some(64),
max_atomic_width: Some(32),
atomic_cas: true,

features: "+m,+c".into(),
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