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5 changes: 5 additions & 0 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7235,6 +7235,11 @@ bool AArch64TargetLowering::isEligibleForTailCallOptimization(
const Function &CallerF = MF.getFunction();
CallingConv::ID CallerCC = CallerF.getCallingConv();

// Arm64EC varargs calls expect that x4 = sp at entry, this complicates tail
// call handling so disable for now.
if (IsVarArg && Subtarget->isWindowsArm64EC())
return false;

// SME Streaming functions are not eligible for TCO as they may require
// the streaming mode or ZA to be restored after returning from the call.
SMEAttrs CallerAttrs(MF.getFunction());
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6 changes: 6 additions & 0 deletions llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -909,6 +909,7 @@ bool AArch64CallLowering::isEligibleForTailCallOptimization(
CallingConv::ID CalleeCC = Info.CallConv;
MachineFunction &MF = MIRBuilder.getMF();
const Function &CallerF = MF.getFunction();
const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();

LLVM_DEBUG(dbgs() << "Attempting to lower call as tail call\n");

Expand All @@ -926,6 +927,11 @@ bool AArch64CallLowering::isEligibleForTailCallOptimization(
return false;
}

// Arm64EC varargs calls expect that x4 = sp at entry, this complicates tail
// call handling so disable for now.
if (Info.IsVarArg && Subtarget.isWindowsArm64EC())
return false;

// Byval parameters hand the function a pointer directly into the stack area
// we want to reuse during a tail call. Working around this *is* possible (see
// X86).
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