Skip to content

VT: teach a special-case optz about samesign #122590

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Jan 12, 2025
Merged

VT: teach a special-case optz about samesign #122590

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
589afe8
VT: teach a special-case optz about samesign
artagnon Jan 11, 2025
98efe55
VT: use CmpPredicate::getMatching; address review
artagnon Jan 11, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 4 additions & 2 deletions llvm/lib/Analysis/ValueTracking.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9495,7 +9495,8 @@ isImpliedCondICmps(const ICmpInst *LHS, CmpPredicate RPred, const Value *R0,
// must be positive if X >= Y and no overflow".
// Take SGT as an example: L0:x > L1:y and C >= 0
// ==> R0:(x -nsw y) < R1:(-C) is false
if ((LPred == ICmpInst::ICMP_SGT || LPred == ICmpInst::ICMP_SGE) &&
if ((CmpPredicate::getMatching(LPred, ICmpInst::ICMP_SGT) ||
CmpPredicate::getMatching(LPred, ICmpInst::ICMP_SGE)) &&
match(R0, m_NSWSub(m_Specific(L0), m_Specific(L1)))) {
if (match(R1, m_NonPositive()) &&
isImpliedCondMatchingOperands(LPred, RPred) == false)
Expand All @@ -9504,7 +9505,8 @@ isImpliedCondICmps(const ICmpInst *LHS, CmpPredicate RPred, const Value *R0,

// Take SLT as an example: L0:x < L1:y and C <= 0
// ==> R0:(x -nsw y) < R1:(-C) is true
if ((LPred == ICmpInst::ICMP_SLT || LPred == ICmpInst::ICMP_SLE) &&
if ((CmpPredicate::getMatching(LPred, ICmpInst::ICMP_SLT) ||
CmpPredicate::getMatching(LPred, ICmpInst::ICMP_SLE)) &&
match(R0, m_NSWSub(m_Specific(L0), m_Specific(L1)))) {
if (match(R1, m_NonNegative()) &&
isImpliedCondMatchingOperands(LPred, RPred) == true)
Expand Down
10 changes: 2 additions & 8 deletions llvm/test/Analysis/ValueTracking/implied-condition-samesign.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -207,10 +207,7 @@ define i32 @gt_sub_nsw(i32 %x, i32 %y) {
; CHECK: [[TAKEN]]:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
; CHECK-NEXT: [[ABSCOND:%.*]] = icmp samesign ult i32 [[SUB]], -1
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
; CHECK-NEXT: ret i32 [[ABS]]
; CHECK-NEXT: ret i32 [[ADD]]
; CHECK: [[END]]:
; CHECK-NEXT: ret i32 0
;
Expand Down Expand Up @@ -239,10 +236,7 @@ define i32 @ge_sub_nsw(i32 %x, i32 %y) {
; CHECK: [[TAKEN]]:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
; CHECK-NEXT: [[ABSCOND:%.*]] = icmp samesign ult i32 [[SUB]], -1
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
; CHECK-NEXT: ret i32 [[ABS]]
; CHECK-NEXT: ret i32 [[ADD]]
; CHECK: [[END]]:
; CHECK-NEXT: ret i32 0
;
Expand Down
Loading