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[CIR][CIRGen] Change buildX functions to emitX #1093

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Merged
merged 3 commits into from
Nov 9, 2024
Merged

[CIR][CIRGen] Change buildX functions to emitX #1093

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0c4dad6
build -> emit
smeenai Nov 8, 2024
4d269e8
Manual fixups
smeenai Nov 8, 2024
4041cb9
clang-format
smeenai Nov 8, 2024
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6 changes: 3 additions & 3 deletions clang/include/clang/CIR/CIRGenerator.h
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Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ class CIRGenerator : public clang::ASTConsumer {
~HandlingTopLevelDeclRAII() {
unsigned Level = --Self.HandlingTopLevelDecls;
if (Level == 0 && EmitDeferred)
Self.buildDeferredDecls();
Self.emitDeferredDecls();
}
};

Expand Down Expand Up @@ -101,8 +101,8 @@ class CIRGenerator : public clang::ASTConsumer {

bool verifyModule();

void buildDeferredDecls();
void buildDefaultMethods();
void emitDeferredDecls();
void emitDefaultMethods();
};

} // namespace cir
Expand Down
10 changes: 5 additions & 5 deletions clang/include/clang/CIR/MissingFeatures.h
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Expand Up @@ -54,9 +54,9 @@ constexpr bool cirCConvAssertionMode =
namespace cir {

struct MissingFeatures {
// TODO(CIR): Implement the CIRGenFunction::buildTypeCheck method that handles
// TODO(CIR): Implement the CIRGenFunction::emitTypeCheck method that handles
// sanitizer related type check features
static bool buildTypeCheck() { return false; }
static bool emitTypeCheck() { return false; }
static bool tbaa() { return false; }
static bool cleanups() { return false; }
static bool emitNullabilityCheck() { return false; }
Expand Down Expand Up @@ -128,8 +128,8 @@ struct MissingFeatures {

// Missing Emissions
static bool variablyModifiedTypeEmission() { return false; }
static bool buildLValueAlignmentAssumption() { return false; }
static bool buildDerivedToBaseCastForDevirt() { return false; }
static bool emitLValueAlignmentAssumption() { return false; }
static bool emitDerivedToBaseCastForDevirt() { return false; }
static bool emitFunctionEpilog() { return false; }

// References related stuff
Expand Down Expand Up @@ -226,7 +226,7 @@ struct MissingFeatures {
static bool deferredReplacements() { return false; }
static bool shouldInstrumentFunction() { return false; }
static bool xray() { return false; }
static bool buildConstrainedFPCall() { return false; }
static bool emitConstrainedFPCall() { return false; }
static bool emitEmptyRecordCheck() { return false; }

// Inline assembly
Expand Down
58 changes: 29 additions & 29 deletions clang/lib/CIR/CodeGen/CIRAsm.cpp
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Expand Up @@ -200,13 +200,13 @@ static void collectInOutConstrainsInfos(const CIRGenFunction &cgf,
}
}

std::pair<mlir::Value, mlir::Type> CIRGenFunction::buildAsmInputLValue(
std::pair<mlir::Value, mlir::Type> CIRGenFunction::emitAsmInputLValue(
const TargetInfo::ConstraintInfo &Info, LValue InputValue,
QualType InputType, std::string &ConstraintStr, SourceLocation Loc) {

if (Info.allowsRegister() || !Info.allowsMemory()) {
if (hasScalarEvaluationKind(InputType))
return {buildLoadOfLValue(InputValue, Loc).getScalarVal(), mlir::Type()};
return {emitLoadOfLValue(InputValue, Loc).getScalarVal(), mlir::Type()};

mlir::Type Ty = convertType(InputType);
uint64_t Size = CGM.getDataLayout().getTypeSizeInBits(Ty);
Expand All @@ -226,9 +226,9 @@ std::pair<mlir::Value, mlir::Type> CIRGenFunction::buildAsmInputLValue(
}

std::pair<mlir::Value, mlir::Type>
CIRGenFunction::buildAsmInput(const TargetInfo::ConstraintInfo &Info,
const Expr *InputExpr,
std::string &ConstraintStr) {
CIRGenFunction::emitAsmInput(const TargetInfo::ConstraintInfo &Info,
const Expr *InputExpr,
std::string &ConstraintStr) {
auto loc = getLoc(InputExpr->getExprLoc());

// If this can't be a register or memory, i.e., has to be a constant
Expand All @@ -251,23 +251,23 @@ CIRGenFunction::buildAsmInput(const TargetInfo::ConstraintInfo &Info,

if (Info.allowsRegister() || !Info.allowsMemory())
if (CIRGenFunction::hasScalarEvaluationKind(InputExpr->getType()))
return {buildScalarExpr(InputExpr), mlir::Type()};
return {emitScalarExpr(InputExpr), mlir::Type()};
if (InputExpr->getStmtClass() == Expr::CXXThisExprClass)
return {buildScalarExpr(InputExpr), mlir::Type()};
return {emitScalarExpr(InputExpr), mlir::Type()};
InputExpr = InputExpr->IgnoreParenNoopCasts(getContext());
LValue Dest = buildLValue(InputExpr);
return buildAsmInputLValue(Info, Dest, InputExpr->getType(), ConstraintStr,
InputExpr->getExprLoc());
LValue Dest = emitLValue(InputExpr);
return emitAsmInputLValue(Info, Dest, InputExpr->getType(), ConstraintStr,
InputExpr->getExprLoc());
}

static void buildAsmStores(CIRGenFunction &CGF, const AsmStmt &S,
const llvm::ArrayRef<mlir::Value> RegResults,
const llvm::ArrayRef<mlir::Type> ResultRegTypes,
const llvm::ArrayRef<mlir::Type> ResultTruncRegTypes,
const llvm::ArrayRef<LValue> ResultRegDests,
const llvm::ArrayRef<QualType> ResultRegQualTys,
const llvm::BitVector &ResultTypeRequiresCast,
const llvm::BitVector &ResultRegIsFlagReg) {
static void emitAsmStores(CIRGenFunction &CGF, const AsmStmt &S,
const llvm::ArrayRef<mlir::Value> RegResults,
const llvm::ArrayRef<mlir::Type> ResultRegTypes,
const llvm::ArrayRef<mlir::Type> ResultTruncRegTypes,
const llvm::ArrayRef<LValue> ResultRegDests,
const llvm::ArrayRef<QualType> ResultRegQualTys,
const llvm::BitVector &ResultTypeRequiresCast,
const llvm::BitVector &ResultRegIsFlagReg) {
CIRGenBuilderTy &Builder = CGF.getBuilder();
CIRGenModule &CGM = CGF.CGM;
auto CTX = Builder.getContext();
Expand Down Expand Up @@ -337,11 +337,11 @@ static void buildAsmStores(CIRGenFunction &CGF, const AsmStmt &S,
Dest = CGF.makeAddrLValue(A, Ty);
}

CGF.buildStoreThroughLValue(RValue::get(Tmp), Dest);
CGF.emitStoreThroughLValue(RValue::get(Tmp), Dest);
}
}

mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
mlir::LogicalResult CIRGenFunction::emitAsmStmt(const AsmStmt &S) {
// Assemble the final asm string.
std::string AsmString = S.generateAsmString(getContext());

Expand Down Expand Up @@ -405,7 +405,7 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
CGM.Error(S.getAsmLoc(), "multiple outputs to hard register: " + GCCReg);

OutputConstraints.push_back(OutputConstraint);
LValue Dest = buildLValue(OutExpr);
LValue Dest = emitLValue(OutExpr);

if (!Constraints.empty())
Constraints += ',';
Expand Down Expand Up @@ -496,8 +496,8 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
mlir::Value Arg;
mlir::Type ArgElemType;
std::tie(Arg, ArgElemType) =
buildAsmInputLValue(Info, Dest, InputExpr->getType(),
InOutConstraints, InputExpr->getExprLoc());
emitAsmInputLValue(Info, Dest, InputExpr->getType(), InOutConstraints,
InputExpr->getExprLoc());

if (mlir::Type AdjTy = getTargetHooks().adjustInlineAsmType(
*this, OutputConstraint, Arg.getType()))
Expand Down Expand Up @@ -555,7 +555,7 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
std::string ReplaceConstraint(InputConstraint);
mlir::Value Arg;
mlir::Type ArgElemType;
std::tie(Arg, ArgElemType) = buildAsmInput(Info, InputExpr, Constraints);
std::tie(Arg, ArgElemType) = emitAsmInput(Info, InputExpr, Constraints);

// If this input argument is tied to a larger output result, extend the
// input to be the same size as the output. The LLVM backend wants to see
Expand Down Expand Up @@ -676,8 +676,8 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
} else if (ResultRegTypes.size() > 1) {
auto alignment = CharUnits::One();
auto sname = cast<cir::StructType>(ResultType).getName();
auto dest = buildAlloca(sname, ResultType, getLoc(S.getAsmLoc()),
alignment, false);
auto dest = emitAlloca(sname, ResultType, getLoc(S.getAsmLoc()),
alignment, false);
auto addr = Address(dest, alignment);
builder.createStore(getLoc(S.getAsmLoc()), result, addr);

Expand All @@ -692,9 +692,9 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
}
}

buildAsmStores(*this, S, RegResults, ResultRegTypes, ResultTruncRegTypes,
ResultRegDests, ResultRegQualTys, ResultTypeRequiresCast,
ResultRegIsFlagReg);
emitAsmStores(*this, S, RegResults, ResultRegTypes, ResultTruncRegTypes,
ResultRegDests, ResultRegQualTys, ResultTypeRequiresCast,
ResultRegIsFlagReg);

return mlir::success();
}
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