Timer resolution configuration

magic-trace supports four timer resolution modes to -timer-resolution: Low, Normal, High, and Custom. This page attempts to demystify what they mean.

Attaching a full 64-bit timestamp to each control flow event would generate too much data to process, so Intel Processor Trace can be configured to synthesize four types of timing updates:

• Packet Stream Boundary Timestamp Counter (PSB TSC)
• Timestamp Counter (TSC)
• Mini Timestamp Counter (MTC)
• Cycle Accurate Mode (CYC)

A more in-depth description of these updates than is worth reproducing here can be found in man 1 perf-intel-pt.

magic-trace's modes map to Intel PT configuration bits as follows:

• Low: tsc=1,noretcomp (default perf config)
• Normal: cyc=1,cyc_thresh=1,mtc_period=0
• High: cyc=1,cyc_thresh=1,mtc_period=0,noretcomp
• Custom: allows specifying custom values for cyc, cyc_thresh, mtc, mtc_period, noretcomp, psb_period. For example, High is equivalent to (Custom (cyc true) (cyc_thresh 1) (mtc_period 0) (noretcomp true)).

The key take-away is that under Normal timing resolution, magic-trace will receive a timer update once every five branches. In practice, this means that if your program has five consecutive calls with no other branches in-between, they will all appear to magic-trace as having occurred instantaneously.

In High mode, magic-trace instructs the hardware to generate a timing update on every function return, such that while function call timestamps may not be entirely precise, function end timestamps will be.

As a rough rule of thumb, with the default snapshot buffer size, Low allows recording ~20ms of trace data, Normal ~10ms, and High ~5ms.