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@Ruyk Ruyk commented Mar 12, 2020

  • Documented CMake option
  • Getting Started Guide clarifications

Co-Authored-By: Alexander Johnston [email protected]
Signed-off-by: Ruyman Reyes [email protected]

Co-Authored-By: Alexander Johnston <[email protected]>
Signed-off-by: Ruyman Reyes <[email protected]>
@bader bader requested a review from pvchupin March 12, 2020 15:38
@bader bader added cuda CUDA back-end Documentation Missing documentation for the code, compiler or runtime features, etc. labels Mar 12, 2020
@bader bader requested a review from romanovvlad March 12, 2020 15:38
pvchupin
pvchupin previously approved these changes Mar 12, 2020
@bader bader changed the title [SYCL][CUDA] Improv. CUDA backend documentation [SYCL][CUDA] Improve CUDA backend documentation Mar 13, 2020
fwyzard added a commit to fwyzard/llvm that referenced this pull request Mar 14, 2020
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Ruyk commented Mar 16, 2020

Thanks for the review, I've addressed everything (hopefully)

@bader bader merged commit 08163a4 into intel:sycl Mar 17, 2020
alexbatashev pushed a commit to alexbatashev/llvm that referenced this pull request Mar 17, 2020
…e_api_test

* origin/sycl: (1188 commits)
  [SYCL][CUDA] Improve CUDA backend documentation (intel#1293)
  [SYCL] Emit textual IR when -S -fsycl-device-only is used (intel#1314)
  [SYCL] Add prototype of group algorithms (intel#1236)
  [SYCL] XFAIL test on windows to unblock pulldown
  Allow Intel Loop Controls only with SPV_INTEL_fpga_loop_controls
  Apply suggested assert msg change
  Implement SPV_INTEL_io_pipes extension
  [SYCL] Fix dependencies for SYCLLowerIR (intel#1321)
  [CI] Allow builds without pre-downloaded OpenCL in configure.py (intel#1317)
  [SYCL] Move SYCL headers from standard clang location (intel#1308)
  [mlir] Add support for generating dialect declarations via tablegen.
  Be more strict when checking existence of foo
  [CodeGenPrepare] Freeze condition when transforming select to br
  [ORC] Remove an undefined static method from LLJIT.
  [JITLink][AArch64] Fix incorrect capitalization in a testcase name.
  [ORC] Print symbol flags and materializer name in ExecutionSession::dump.
  [JITLink][MachO] Re-apply b64afad, MachO linker-private support, with fixes.
  Basic Block Sections Support.
  Test commit.
  [SYCL][Doc] Deploy documentation for PI (intel#1318)
  ...
alexbatashev pushed a commit to alexbatashev/llvm that referenced this pull request Mar 20, 2020
* sycl: (1209 commits)
  [SYCL] Check exit status get_device_count_by_type
  [SYCL][Doc] Update sub-group extension docs (intel#1330)
  [SYCL][Doc] Add leader to GroupAlgorithms (intel#1297)
  [SYCL] Add SYCL headers search path to default compilation options (intel#1347)
  [SYCL][PI] Add interoperability with generic handles to device and program classes (intel#1244)
  Move SPIR devicelib to top level (intel#1276)
  [SYCL][Driver] Improve fat static library support (intel#1319)
  [SYCL] Remove image_api LIT (intel#1349)
  [SYCL] Fix headers location for check-sycl-deploy target
  [SYCL] Allow gcc asm statements in kernel code (intel#1341)
  [SYCL] Add Intel FPGA force_pow2_depth attribute (intel#1284)
  [SPIR-V][NFC] Fix for building llvm-spirv with -DLLVM_LINK_LLVM_DYLIB=ON (intel#1323)
  [SYCL][NFC] Fix execution graph dump (intel#1331)
  [SYCL][Doc] Release SYCL_INTEL_enqueue_barrier extension document (intel#1199)
  [SYCL][USM] Fix USM malloc_shared and free to handle zero byte (intel#1273)
  [SYCL] Fix undefined symbols in async_work_group_copy (intel#1243)
  [SYCL] Mark calls to barrier and work-item functions as convergent
  [SYCL][CUDA] Fix CUDA plug-in build with enabled assertions (intel#1325)
  [SYCL][Test] Add OpenCL requirement to test/ordered_queue/prop.cpp (intel#1335)
  [SYCL][CUDA] Improve CUDA backend documentation (intel#1293)
  ...
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