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[JIT] [Issue: 61620] Optimizing ARM64 for *x = dblCns; #61847

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Merged
merged 10 commits into from
Nov 30, 2021
Merged

[JIT] [Issue: 61620] Optimizing ARM64 for *x = dblCns; #61847

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b91555e
[Issue: 61620] Optimizing ARM64 for *x = 0;
SeanWoo Nov 19, 2021
ee617c7
Update src/coreclr/jit/lower.cpp
SeanWoo Nov 19, 2021
36bc6b4
Fixed bug with * x = dConst if dConst is not 0
SeanWoo Nov 19, 2021
0596430
remove extra printf
SeanWoo Nov 19, 2021
b9b0f55
Replacing IsFPZero with IsCnsNonZeroFltOrDbl for STOREIND Minor edits…
SeanWoo Nov 20, 2021
9a2a2d5
fixed ARM codegen for STOREIND
SeanWoo Nov 21, 2021
25f047e
Update src/coreclr/jit/lower.cpp
SeanWoo Nov 21, 2021
153fd39
Update src/coreclr/jit/lower.cpp
SeanWoo Nov 21, 2021
d5dd56b
fix formatting
SeanWoo Nov 30, 2021
ec0f188
Merge branch 'issue-61620-ARM64' of https://github.com/SeanWoo/runtim…
SeanWoo Nov 30, 2021
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34 changes: 34 additions & 0 deletions src/coreclr/jit/lower.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6792,6 +6792,40 @@ void Lowering::LowerStoreIndirCommon(GenTreeStoreInd* ind)
TryCreateAddrMode(ind->Addr(), true, ind->TypeGet());
if (!comp->codeGen->gcInfo.gcIsWriteBarrierStoreIndNode(ind))
{
if (varTypeIsFloating(ind) && ind->Data()->IsCnsFltOrDbl())
{
// Optimize *x = DCON to *x = ICON which is slightly faster on xarch
GenTree* data = ind->Data();
double dblCns = data->AsDblCon()->gtDconVal;
ssize_t intCns = 0;
var_types type = TYP_UNKNOWN;

if (ind->TypeIs(TYP_FLOAT)
#if defined(TARGET_ARM64) || defined(TARGET_ARM)
&& data->IsFPZero()
#endif
)
{
float fltCns = static_cast<float>(dblCns); // should be a safe round-trip
intCns = static_cast<ssize_t>(*reinterpret_cast<INT32*>(&fltCns));
type = TYP_INT;
}
#ifdef TARGET_AMD64
else
{
assert(ind->TypeIs(TYP_DOUBLE));
intCns = static_cast<ssize_t>(*reinterpret_cast<INT64*>(&dblCns));
type = TYP_LONG;
}
#endif

if (type != TYP_UNKNOWN)
{
data->BashToConst(intCns, type);
ind->ChangeType(type);
}
}

LowerStoreIndir(ind);
}
}
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32 changes: 1 addition & 31 deletions src/coreclr/jit/lowerxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -130,37 +130,7 @@ void Lowering::LowerStoreIndir(GenTreeStoreInd* node)
return;
}
}
else if (node->Data()->IsCnsFltOrDbl())
{
// Optimize *x = DCON to *x = ICON which is slightly faster on xarch
GenTree* data = node->Data();
double dblCns = data->AsDblCon()->gtDconVal;
ssize_t intCns = 0;
var_types type = TYP_UNKNOWN;

if (node->TypeIs(TYP_FLOAT))
{
float fltCns = static_cast<float>(dblCns); // should be a safe round-trip
intCns = static_cast<ssize_t>(*reinterpret_cast<INT32*>(&fltCns));
type = TYP_INT;
}
#ifdef TARGET_AMD64
else
{
assert(node->TypeIs(TYP_DOUBLE));
intCns = static_cast<ssize_t>(*reinterpret_cast<INT64*>(&dblCns));
type = TYP_LONG;
}
#endif

if (type != TYP_UNKNOWN)
{
data->SetContained();
data->BashToConst(intCns, type);
node->ChangeType(type);
}
}


// Optimization: do not unnecessarily zero-extend the result of setcc.
if (varTypeIsByte(node) && (node->Data()->OperIsCompare() || node->Data()->OperIs(GT_SETCC)))
{
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