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[LoongArch64] Handle LASX/LSX/FP context depending on ISA availability. #118007

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Merged
merged 7 commits into from
Aug 2, 2025
Merged

[LoongArch64] Handle LASX/LSX/FP context depending on ISA availability. #118007

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be994e3
[LoongArch64] Fix SDK running on 2K series SoC.
LuckyXu-HF Jul 24, 2025
fd9c604
Update context2.S.
LuckyXu-HF Jul 25, 2025
3f70f7d
update annotation.
LuckyXu-HF Jul 25, 2025
a32424c
revert src/native/minipal
LuckyXu-HF Jul 28, 2025
187f621
call minipal_getcpufeatures() to check the LASX/LSX/FP context ISA av…
LuckyXu-HF Jul 28, 2025
d06e11d
match how RestoreContext work.
LuckyXu-HF Jul 31, 2025
dcb8d20
revert RtlCaptureContext and unrelated code.
LuckyXu-HF Aug 1, 2025
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66 changes: 0 additions & 66 deletions src/coreclr/pal/inc/unixasmmacrosloongarch64.inc
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Original file line number Diff line number Diff line change
Expand Up @@ -82,14 +82,8 @@ C_FUNC(\Name\()_End):

////NOTE: reg1 and reg2 must be the number and GPR type !!!
.macro PROLOG_SAVE_REG_PAIR reg1, reg2, ofs, __def_cfa_save=0
//#ifdef FEATURE_LOONGSONISA
// //NOTE:The offset of gssq/gslq must be 16-bytes aligned.
// // here ofs must be 16-bytes aligned.
// gssq \reg2, \reg1, \ofs(sp)
//#else
st.d $r\reg1, $sp, \ofs
st.d $r\reg2, $sp, \ofs+8
//#endif

.cfi_rel_offset \reg1, \ofs
.cfi_rel_offset \reg2, \ofs + 8
Expand Down Expand Up @@ -123,23 +117,15 @@ C_FUNC(\Name\()_End):
.endm

.macro EPILOG_RESTORE_REG_PAIR reg1, reg2, ofs
//#ifdef FEATURE_LOONGSONISA
// gslq \reg2, \reg1, \ofs(sp)
//#else
ld.d $r\reg2, $sp, \ofs+8
ld.d $r\reg1, $sp, \ofs
//#endif
.cfi_restore \reg2
.cfi_restore \reg1
.endm

.macro EPILOG_RESTORE_REG_PAIR_INDEXED reg1, reg2, ssize
//#ifdef FEATURE_LOONGSONISA
// gslq \reg2, \reg1, 0(sp)
//#else
ld.d $r\reg2, $sp, 8
ld.d $r\reg1, $sp, 0
//#endif
.cfi_restore \reg2
.cfi_restore \reg1

Expand Down Expand Up @@ -183,14 +169,6 @@ C_FUNC(\Name\()_End):
// Reserve 64 bytes of memory before calling SAVE_ARGUMENT_REGISTERS
.macro SAVE_ARGUMENT_REGISTERS reg, ofs

//#ifdef FEATURE_LOONGSONISA
// //NOTE:The offset of gssq/gslq must be 16-bytes aligned.
// // here ofs must be 16-bytes aligned.
// gssq a1, a0, \ofs(\reg)
// gssq a3, a2, \ofs+16(\reg)
// gssq a5, a4, \ofs+32(\reg)
// gssq a7, a6, \ofs+48(\reg)
//#else
st.d $a0, \reg, \ofs
st.d $a1, \reg, \ofs+8
st.d $a2, \reg, \ofs+16
Expand All @@ -199,21 +177,12 @@ C_FUNC(\Name\()_End):
st.d $a5, \reg, \ofs+40
st.d $a6, \reg, \ofs+48
st.d $a7, \reg, \ofs+56
//#endif

.endm

// Reserve 64 bytes of memory before calling SAVE_FLOAT_ARGUMENT_REGISTERS
.macro SAVE_FLOAT_ARGUMENT_REGISTERS reg, ofs

//#ifdef FEATURE_LOONGSONISA
// //NOTE:The offset of gssqc1/gslqc1 must be 16-bytes aligned.
// // here ofs must be 16-bytes aligned.
// gssqc1 $f13, $f12, \ofs(\reg)
// gssqc1 $f15, $f14, \ofs+16(\reg)
// gssqc1 $f17, $f16, \ofs+32(\reg)
// gssqc1 $f19, $f18, \ofs+48(\reg)
//#else
fst.d $f0, \reg, \ofs
fst.d $f1, \reg, \ofs+8
fst.d $f2, \reg, \ofs+16
Expand All @@ -222,21 +191,12 @@ C_FUNC(\Name\()_End):
fst.d $f5, \reg, \ofs+40
fst.d $f6, \reg, \ofs+48
fst.d $f7, \reg, \ofs+56
//#endif

.endm

// Reserve 64 bytes of memory before calling SAVE_FLOAT_CALLEESAVED_REGISTERS
.macro SAVE_FLOAT_CALLEESAVED_REGISTERS reg, ofs

//#ifdef FEATURE_LOONGSONISA
// //NOTE:The offset of gssqc1/gslqc1 must be 16-bytes aligned.
// // here ofs must be 16-bytes aligned.
// gssqc1 $f25, $f24, \ofs(\reg)
// gssqc1 $f27, $f26, \ofs+16(\reg)
// gssqc1 $f29, $f28, \ofs+32(\reg)
// gssqc1 $f31, $f30, \ofs+48(\reg)
//#else
fst.d $f24, \reg, \ofs
fst.d $f25, \reg, \ofs+8
fst.d $f26, \reg, \ofs+16
Expand All @@ -245,7 +205,6 @@ C_FUNC(\Name\()_End):
fst.d $f29, \reg, \ofs+40
fst.d $f30, \reg, \ofs+48
fst.d $f31, \reg, \ofs+56
//#endif

.endm

Expand All @@ -260,14 +219,6 @@ C_FUNC(\Name\()_End):

.macro RESTORE_ARGUMENT_REGISTERS reg, ofs

//#ifdef FEATURE_LOONGSONISA
// //NOTE:The offset of gssq/gslq must be 16-bytes aligned.
// // here ofs must be 16-bytes aligned.
// gslq a7, a6, \ofs+48(\reg)
// gslq a5, a4, \ofs+32(\reg)
// gslq a3, a2, \ofs+16(\reg)
// gslq a1, a0, \ofs(\reg)
//#else
ld.d $a7, \reg, \ofs+56
ld.d $a6, \reg, \ofs+48
ld.d $a5, \reg, \ofs+40
Expand All @@ -276,18 +227,11 @@ C_FUNC(\Name\()_End):
ld.d $a2, \reg, \ofs+16
ld.d $a1, \reg, \ofs+8
ld.d $a0, \reg, \ofs
//#endif

.endm

.macro RESTORE_FLOAT_ARGUMENT_REGISTERS reg, ofs

//#ifdef FEATURE_LOONGSONISA
// gslqc1 $f19, $f18, \ofs+48(\reg)
// gslqc1 $f17, $f16, \ofs+32(\reg)
// gslqc1 $f15, $f14, \ofs+16(\reg)
// gslqc1 $f13, $f12, \ofs(\reg)
//#else
fld.d $f7, \reg, \ofs+56
fld.d $f6, \reg, \ofs+48
fld.d $f5, \reg, \ofs+40
Expand All @@ -296,20 +240,11 @@ C_FUNC(\Name\()_End):
fld.d $f2, \reg, \ofs+16
fld.d $f1, \reg, \ofs+8
fld.d $f0, \reg, \ofs
//#endif

.endm

.macro RESTORE_FLOAT_CALLEESAVED_REGISTERS reg, ofs

//#ifdef FEATURE_LOONGSONISA
// //NOTE:The offset of gssqc1/gslqc1 must be 16-bytes aligned.
// // here ofs must be 16-bytes aligned.
// gslqc1 $f25, $f24, \ofs(\reg)
// gslqc1 $f27, $f26, \ofs+16(\reg)
// gslqc1 $f29, $f28, \ofs+32(\reg)
// gslqc1 $f31, $f30, \ofs+48(\reg)
//#else
fld.d $f24, $r\reg, \ofs
fld.d $f25, $r\reg, \ofs+8
fld.d $f26, $r\reg, \ofs+16
Expand All @@ -318,7 +253,6 @@ C_FUNC(\Name\()_End):
fld.d $f29, $r\reg, \ofs+40
fld.d $f30, $r\reg, \ofs+48
fld.d $f31, $r\reg, \ofs+56
//#endif

.endm

Expand Down
3 changes: 3 additions & 0 deletions src/coreclr/pal/src/arch/loongarch64/asmconstants.h
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Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,9 @@
#define CONTEXT_FLOATING_POINT_BIT (2)
#define CONTEXT_DEBUG_REGISTERS_BIT (3)

#define CONTEXT_HWCAP_LOONGARCH_LSX_BIT (1 << 4)
#define CONTEXT_HWCAP_LOONGARCH_LASX_BIT (1 << 5)

#define CONTEXT_CONTROL (CONTEXT_LOONGARCH64 | (1 << CONTEXT_CONTROL_BIT))
#define CONTEXT_INTEGER (CONTEXT_LOONGARCH64 | (1 << CONTEXT_INTEGER_BIT))
#define CONTEXT_FLOATING_POINT (CONTEXT_LOONGARCH64 | (1 << CONTEXT_FLOATING_POINT_BIT))
Expand Down
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