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4ca1134
Fix menu.h _draw, fstr -> ftpl
classicrocker883 Nov 25, 2023
6c8de12
Merge branch 'MarlinFirmware:bugfix-2.1.x' into bugfix-2.1.x-Nov4
classicrocker883 Nov 25, 2023
ef90bb1
Merge branch 'MarlinFirmware:bugfix-2.1.x' into bugfix-2.1.x-Nov4
classicrocker883 Nov 27, 2023
66f25b7
take care of warnings
classicrocker883 Nov 27, 2023
cd8268f
Add Voxelab Aquila support
classicrocker883 Nov 27, 2023
effab6d
DWIN displays work better w/ ENCODER_WAIT_MS 10
classicrocker883 Nov 27, 2023
1803f5c
initial cleanup
thinkyhead Nov 28, 2023
666297e
Closer match to STM32F1
thinkyhead Nov 29, 2023
159e58b
consolidate
thinkyhead Nov 29, 2023
aefe761
Perhaps (?)
thinkyhead Nov 29, 2023
7ec2b92
headers besides HAL.h get Cond_post
thinkyhead Nov 29, 2023
2bd2507
cleanup
thinkyhead Nov 29, 2023
935d44f
translate
thinkyhead Nov 29, 2023
4d51fa5
one less
thinkyhead Nov 29, 2023
a81adbc
Update pins_AQUILA_101.h
classicrocker883 Nov 29, 2023
5147554
fix adc
thinkyhead Nov 29, 2023
c177b38
redundant
thinkyhead Nov 29, 2023
3a147f5
Already runs custom_board.py
thinkyhead Nov 29, 2023
9bebe51
allow 512k build, but warn
thinkyhead Nov 29, 2023
a772f10
just wrap ADC init
thinkyhead Nov 30, 2023
389e48f
Merge branch 'bugfix-2.1.x' of https://github.com/MarlinFirmware/Marl…
classicrocker883 Dec 1, 2023
bf5978b
SAMD51 ADCs
thinkyhead Dec 1, 2023
72e3ea9
Update hc32.ini
classicrocker883 Dec 1, 2023
9db7a30
Update boards.h
classicrocker883 Dec 1, 2023
eca7118
fix drawInt to "long value"
classicrocker883 Dec 1, 2023
fc51c28
fix error for BTT_SKR_MINI_E3_V3_0_1
classicrocker883 Dec 2, 2023
3e75d64
keep old names
thinkyhead Dec 2, 2023
e5fbca7
shorter
thinkyhead Dec 2, 2023
2e2bc47
revert Conditionals_adv.h
classicrocker883 Dec 2, 2023
9eca3eb
Merge branch 'bugfix-2.1.x-Nov4' of https://github.com/classicrocker8…
classicrocker883 Dec 2, 2023
90f35ee
✅ Temporary CI Tests for 2.1.x
thinkyhead Dec 1, 2023
f52cc53
🧑‍💻 More num-to-string digits / precisions (#26343)
ellensp Dec 1, 2023
40f5bbc
[cron] Bump distribution date (2023-12-02)
thinkyhead Dec 2, 2023
8801769
Merge remote-tracking branch 'upstream/bugfix-2.1.x' into pr/26470
thinkyhead Dec 2, 2023
c28fd79
fix for STM32F401RC_btt
classicrocker883 Dec 2, 2023
b8f0782
Merge branch 'bugfix-2.1.x-Nov4' of https://github.com/classicrocker8…
classicrocker883 Dec 2, 2023
37bbe74
Merge branch 'bugfix-2.1.x' into pr/26470
thinkyhead Dec 2, 2023
a6d4696
developer note
thinkyhead Dec 2, 2023
d3c72d2
or, rather…
thinkyhead Dec 2, 2023
ceed393
just in case
thinkyhead Dec 2, 2023
5467d74
32 bit pin type
thinkyhead Dec 2, 2023
7a52a05
Update adc.h
classicrocker883 Dec 3, 2023
c049e45
Merge branch 'bugfix-2.1.x' into pr/26470
thinkyhead Dec 5, 2023
708dd91
Try FORCE_INLINE
thinkyhead Dec 5, 2023
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2 changes: 1 addition & 1 deletion Marlin/src/HAL/STM32/HAL.h
Original file line number Diff line number Diff line change
Expand Up @@ -138,7 +138,7 @@

typedef double isr_float_t; // FPU ops are used for single-precision, so use double for ISRs.

#if defined(STM32G0B1xx) || defined(STM32H7xx)
#if defined(STM32G0B1xx) || defined(STM32H7xx) || defined(STM32F401xC)
typedef int32_t pin_t;
#else
typedef int16_t pin_t;
Expand Down
279 changes: 85 additions & 194 deletions Marlin/src/HAL/STM32F1/HAL.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -29,53 +29,8 @@
#include "../../inc/MarlinConfig.h"
#include "HAL.h"

#include <STM32ADC.h>

// ------------------------
// Types
// ------------------------

#define __I
#define __IO volatile
typedef struct {
__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
__IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
__IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
__IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
__IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
__IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
__IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
__IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
__IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
__IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
__IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
__I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
__I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
__I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
__I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
__I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
uint32_t RESERVED0[5];
__IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
} SCB_Type;

// ------------------------
// Local defines
// ------------------------

#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */

#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */

/* SCB Application Interrupt and Reset Control Register Definitions */
#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */

#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
#include "adc.h"
uint16_t adc_results[ADC_COUNT];

// ------------------------
// Serial ports
Expand Down Expand Up @@ -171,153 +126,9 @@ void analogWrite(const pin_t pin, int pwm_val8) {

uint16_t MarlinHAL::adc_result;

// ------------------------
// Private functions
// ------------------------

static void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) {
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); // only values 0..7 are used

reg_value = SCB->AIRCR; // read old register configuration
reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); // clear bits to change
reg_value = (reg_value |
((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << 8)); // Insert write key & priority group
SCB->AIRCR = reg_value;
}

// ------------------------
// Public functions
// ------------------------

void flashFirmware(const int16_t) { hal.reboot(); }

//
// Leave PA11/PA12 intact if USBSerial is not used
//
#if SERIAL_USB
namespace wirish { namespace priv {
#if SERIAL_PORT > 0
#if SERIAL_PORT2
#if SERIAL_PORT2 > 0
void board_setup_usb() {}
#endif
#else
void board_setup_usb() {}
#endif
#endif
} }
#endif

TERN_(POSTMORTEM_DEBUGGING, extern void install_min_serial());

// ------------------------
// MarlinHAL class
// ------------------------

void MarlinHAL::init() {
NVIC_SetPriorityGrouping(0x3);
#if PIN_EXISTS(LED)
OUT_WRITE(LED_PIN, LOW);
#endif
#if HAS_SD_HOST_DRIVE
MSC_SD_init();
#elif ALL(SERIAL_USB, EMERGENCY_PARSER)
usb_cdcacm_set_hooks(USB_CDCACM_HOOK_RX, my_rx_callback);
#endif
#if PIN_EXISTS(USB_CONNECT)
OUT_WRITE(USB_CONNECT_PIN, !USB_CONNECT_INVERTING); // USB clear connection
delay(1000); // Give OS time to notice
WRITE(USB_CONNECT_PIN, USB_CONNECT_INVERTING);
#endif
TERN_(POSTMORTEM_DEBUGGING, install_min_serial()); // Install the minimal serial handler
}

// HAL idle task
void MarlinHAL::idletask() {
#if HAS_SHARED_MEDIA
// If Marlin is using the SD card we need to lock it to prevent access from
// a PC via USB.
// Other HALs use IS_SD_PRINTING() and IS_SD_FILE_OPEN() to check for access but
// this will not reliably detect delete operations. To be safe we will lock
// the disk if Marlin has it mounted. Unfortunately there is currently no way
// to unmount the disk from the LCD menu.
// if (IS_SD_PRINTING() || IS_SD_FILE_OPEN())
/* copy from lpc1768 framework, should be fixed later for process HAS_SD_HOST_DRIVE*/
// process USB mass storage device class loop
MarlinMSC.loop();
#endif
}

void MarlinHAL::reboot() { nvic_sys_reset(); }
#ifndef VOXELAB_N32

// ------------------------
// Free Memory Accessor
// ------------------------

extern "C" {
extern unsigned int _ebss; // end of bss section
}

/**
* TODO: Change this to correct it for libmaple
*/

// return free memory between end of heap (or end bss) and whatever is current

/*
#include <wirish/syscalls.c>
//extern caddr_t _sbrk(int incr);
#ifndef CONFIG_HEAP_END
extern char _lm_heap_end;
#define CONFIG_HEAP_END ((caddr_t)&_lm_heap_end)
#endif

extern "C" {
static int freeMemory() {
char top = 't';
return &top - reinterpret_cast<char*>(sbrk(0));
}
int freeMemory() {
int free_memory;
int heap_end = (int)_sbrk(0);
free_memory = ((int)&free_memory) - ((int)heap_end);
return free_memory;
}
}
*/

// ------------------------
// ADC
// ------------------------

enum ADCIndex : uint8_t {
OPTITEM(HAS_TEMP_ADC_0, TEMP_0)
OPTITEM(HAS_TEMP_ADC_1, TEMP_1)
OPTITEM(HAS_TEMP_ADC_2, TEMP_2)
OPTITEM(HAS_TEMP_ADC_3, TEMP_3)
OPTITEM(HAS_TEMP_ADC_4, TEMP_4)
OPTITEM(HAS_TEMP_ADC_5, TEMP_5)
OPTITEM(HAS_TEMP_ADC_6, TEMP_6)
OPTITEM(HAS_TEMP_ADC_7, TEMP_7)
OPTITEM(HAS_HEATED_BED, TEMP_BED)
OPTITEM(HAS_TEMP_CHAMBER, TEMP_CHAMBER)
OPTITEM(HAS_TEMP_ADC_PROBE, TEMP_PROBE)
OPTITEM(HAS_TEMP_COOLER, TEMP_COOLER)
OPTITEM(HAS_TEMP_BOARD, TEMP_BOARD)
OPTITEM(HAS_TEMP_SOC, TEMP_SOC)
OPTITEM(FILAMENT_WIDTH_SENSOR, FILWIDTH)
OPTITEM(HAS_ADC_BUTTONS, ADC_KEY)
OPTITEM(HAS_JOY_ADC_X, JOY_X)
OPTITEM(HAS_JOY_ADC_Y, JOY_Y)
OPTITEM(HAS_JOY_ADC_Z, JOY_Z)
OPTITEM(POWER_MONITOR_CURRENT, POWERMON_CURRENT)
OPTITEM(POWER_MONITOR_VOLTAGE, POWERMON_VOLTAGE)
ADC_COUNT
};

static uint16_t adc_results[ADC_COUNT];
#include <STM32ADC.h>

// Init the AD in continuous capture mode
void MarlinHAL::adc_init() {
Expand Down Expand Up @@ -345,7 +156,7 @@ void MarlinHAL::adc_init() {
OPTITEM(POWER_MONITOR_VOLTAGE, POWER_MONITOR_VOLTAGE_PIN)
};
static STM32ADC adc(ADC1);
// configure the ADC
// Configure the ADC
adc.calibrate();
adc.setSampleRate((F_CPU > 72000000) ? ADC_SMPR_71_5 : ADC_SMPR_41_5); // 71.5 or 41.5 ADC cycles
adc.setPins((uint8_t *)adc_pins, ADC_COUNT);
Expand All @@ -355,6 +166,8 @@ void MarlinHAL::adc_init() {
adc.startConversion();
}

#endif // !VOXELAB_N32

void MarlinHAL::adc_start(const pin_t pin) {
#define __TCASE(N,I) case N: pin_index = I; break;
#define _TCASE(C,N,I) TERN_(C, __TCASE(N, I))
Expand Down Expand Up @@ -386,4 +199,82 @@ void MarlinHAL::adc_start(const pin_t pin) {
adc_result = (adc_results[(int)pin_index] & 0xFFF) >> (12 - HAL_ADC_RESOLUTION); // shift out unused bits
}

// ------------------------
// Public functions
// ------------------------

void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) {
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); // only values 0..7 are used

reg_value = SCB->AIRCR; // read old register configuration
reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); // clear bits to change
reg_value = (reg_value |
((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << 8)); // Insert write key & priority group
SCB->AIRCR = reg_value;
}

void flashFirmware(const int16_t) { hal.reboot(); }

//
// Leave PA11/PA12 intact if USBSerial is not used
//
#if SERIAL_USB
namespace wirish { namespace priv {
#if SERIAL_PORT > 0
#if SERIAL_PORT2
#if SERIAL_PORT2 > 0
void board_setup_usb() {}
#endif
#else
void board_setup_usb() {}
#endif
#endif
} }
#endif

TERN_(POSTMORTEM_DEBUGGING, extern void install_min_serial());

// ------------------------
// MarlinHAL class
// ------------------------

void MarlinHAL::init() {
NVIC_SetPriorityGrouping(0x3);
#if PIN_EXISTS(LED)
OUT_WRITE(LED_PIN, LOW);
#endif
#if HAS_SD_HOST_DRIVE
MSC_SD_init();
#elif ALL(SERIAL_USB, EMERGENCY_PARSER)
usb_cdcacm_set_hooks(USB_CDCACM_HOOK_RX, my_rx_callback);
#endif
#if PIN_EXISTS(USB_CONNECT)
OUT_WRITE(USB_CONNECT_PIN, !USB_CONNECT_INVERTING); // USB clear connection
delay(1000); // Give OS time to notice
WRITE(USB_CONNECT_PIN, USB_CONNECT_INVERTING);
#endif
TERN_(POSTMORTEM_DEBUGGING, install_min_serial()); // Install the minimal serial handler
}

// HAL idle task
void MarlinHAL::idletask() {
#if HAS_SHARED_MEDIA
/**
* When Marlin is using the SD card it should be locked to prevent it being
* accessed from a PC over USB.
* Other HALs use (IS_SD_PRINTING() || IS_SD_FILE_OPEN()) to check for access
* but this won't reliably detect other file operations. To be safe we just lock
* the drive whenever Marlin has it mounted. LCDs should include an Unmount
* command so drives can be released as needed.
*/
/* Copied from LPC1768 framework. Should be fixed later to process HAS_SD_HOST_DRIVE */
//if (!drive_locked()) // TODO
MarlinMSC.loop(); // Process USB mass storage device class loop
#endif
}

void MarlinHAL::reboot() { nvic_sys_reset(); }

#endif // __STM32F1__
48 changes: 48 additions & 0 deletions Marlin/src/HAL/STM32F1/HAL.h
Original file line number Diff line number Diff line change
Expand Up @@ -223,6 +223,8 @@ void flashFirmware(const int16_t);

extern "C" char* _sbrk(int incr);

void NVIC_SetPriorityGrouping(uint32_t PriorityGroup);

#pragma GCC diagnostic push
#if GCC_VERSION <= 50000
#pragma GCC diagnostic ignored "-Wunused-function"
Expand Down Expand Up @@ -306,3 +308,49 @@ class MarlinHAL {
static void set_pwm_frequency(const pin_t pin, const uint16_t f_desired);

};

// ------------------------
// Types
// ------------------------

#define __I
#define __IO volatile
typedef struct {
__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
__IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
__IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
__IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
__IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
__IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
__IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
__IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
__IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
__IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
__IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
__I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
__I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
__I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
__I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
__I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
uint32_t RESERVED0[5];
__IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
} SCB_Type;

// ------------------------
// System Control Space
// ------------------------

#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */

#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */

/* SCB Application Interrupt and Reset Control Register Definitions */
#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */

#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
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