|  | 
|  | 1 | +/********************************************************************* | 
|  | 2 | +*                SEGGER MICROCONTROLLER SYSTEME GmbH                 * | 
|  | 3 | +*        Solutions for real time microcontroller applications        * | 
|  | 4 | +********************************************************************** | 
|  | 5 | +*                                                                    * | 
|  | 6 | +*        (C) 2004-2009    SEGGER Microcontroller Systeme GmbH        * | 
|  | 7 | +*                                                                    * | 
|  | 8 | +*      Internet: www.segger.com    Support:  [email protected]      * | 
|  | 9 | +*                                                                    * | 
|  | 10 | +********************************************************************** | 
|  | 11 | +---------------------------------------------------------------------- | 
|  | 12 | +File        : RTOSPlugin.h | 
|  | 13 | +Purpose     : RTOS plugin header | 
|  | 14 | +---------------------------END-OF-HEADER------------------------------ | 
|  | 15 | +*/ | 
|  | 16 | + | 
|  | 17 | +#ifndef RTOSPLUGIN_H              // Guard against multiple inclusion | 
|  | 18 | +#define RTOSPLUGIN_H | 
|  | 19 | + | 
|  | 20 | +#include "JLINKARM_Const.h" | 
|  | 21 | +#include "TYPES.h" | 
|  | 22 | + | 
|  | 23 | +#if defined(__cplusplus)    // Allow usage of this module from C++ files (disable name mangling) | 
|  | 24 | +  extern "C" { | 
|  | 25 | +#endif | 
|  | 26 | + | 
|  | 27 | +/********************************************************************* | 
|  | 28 | +* | 
|  | 29 | +*       Defines | 
|  | 30 | +* | 
|  | 31 | +********************************************************************** | 
|  | 32 | +*/ | 
|  | 33 | + | 
|  | 34 | +#define RTOS_PLUGIN_BUF_SIZE_THREAD_DISPLAY  256  // Size of buffer in bytes that is passed to RTOS_GetThreadDisplay() | 
|  | 35 | + | 
|  | 36 | +/********************************************************************* | 
|  | 37 | +* | 
|  | 38 | +*       Types | 
|  | 39 | +* | 
|  | 40 | +********************************************************************** | 
|  | 41 | +*/ | 
|  | 42 | + | 
|  | 43 | +enum RTOS_PLUGIN_CPU_REGS_CORTEX_M { | 
|  | 44 | +  // | 
|  | 45 | +  // These register indexes must NOT be in line with the J-Link DLL register indexes, | 
|  | 46 | +  // nor the GDB register indexes (because the GDB indexes may change, depending on if J-Link GDBServer reports a different Target.xml file to GDB | 
|  | 47 | +  // These indexes have been determined once and stay fixed to guarantee binary compatibility between different GDBServer versions | 
|  | 48 | +  // | 
|  | 49 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R0=0,       // 32-bit reg | 
|  | 50 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R1,         // 32-bit reg | 
|  | 51 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R2,         // 32-bit reg | 
|  | 52 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R3,         // 32-bit reg | 
|  | 53 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R4,         // 32-bit reg | 
|  | 54 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R5,         // 32-bit reg | 
|  | 55 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R6,         // 32-bit reg | 
|  | 56 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R7,         // 32-bit reg | 
|  | 57 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R8,         // 32-bit reg | 
|  | 58 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R9,         // 32-bit reg | 
|  | 59 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R10,        // 32-bit reg | 
|  | 60 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R11,        // 32-bit reg | 
|  | 61 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_R12,        // 32-bit reg | 
|  | 62 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_SP,         // 32-bit reg | 
|  | 63 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_LR,         // 32-bit reg | 
|  | 64 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_PC,         // 32-bit reg | 
|  | 65 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_XPSR,       // 32-bit reg | 
|  | 66 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_MSP,        // 32-bit reg | 
|  | 67 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_PSP,        // 32-bit reg | 
|  | 68 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_PRIMASK,    // 32-bit reg | 
|  | 69 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_BASEPRI,    // 32-bit reg | 
|  | 70 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_FAULTMASK,  // 32-bit reg | 
|  | 71 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_CONTROL,    // 32-bit reg | 
|  | 72 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_FPSCR,      // 32-bit reg | 
|  | 73 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S0,         // 32-bit reg | 
|  | 74 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S1,         // 32-bit reg | 
|  | 75 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S2,         // 32-bit reg | 
|  | 76 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S3,         // 32-bit reg | 
|  | 77 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S4,         // 32-bit reg | 
|  | 78 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S5,         // 32-bit reg | 
|  | 79 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S6,         // 32-bit reg | 
|  | 80 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S7,         // 32-bit reg | 
|  | 81 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S8,         // 32-bit reg | 
|  | 82 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S9,         // 32-bit reg | 
|  | 83 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S10,        // 32-bit reg | 
|  | 84 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S11,        // 32-bit reg | 
|  | 85 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S12,        // 32-bit reg | 
|  | 86 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S13,        // 32-bit reg | 
|  | 87 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S14,        // 32-bit reg | 
|  | 88 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S15,        // 32-bit reg | 
|  | 89 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S16,        // 32-bit reg | 
|  | 90 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S17,        // 32-bit reg | 
|  | 91 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S18,        // 32-bit reg | 
|  | 92 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S19,        // 32-bit reg | 
|  | 93 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S20,        // 32-bit reg | 
|  | 94 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S21,        // 32-bit reg | 
|  | 95 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S22,        // 32-bit reg | 
|  | 96 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S23,        // 32-bit reg | 
|  | 97 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S24,        // 32-bit reg | 
|  | 98 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S25,        // 32-bit reg | 
|  | 99 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S26,        // 32-bit reg | 
|  | 100 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S27,        // 32-bit reg | 
|  | 101 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S28,        // 32-bit reg | 
|  | 102 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S29,        // 32-bit reg | 
|  | 103 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S30,        // 32-bit reg | 
|  | 104 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_S31,        // 32-bit reg | 
|  | 105 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D0,         // 64-bit reg | 
|  | 106 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D1,         // 64-bit reg | 
|  | 107 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D2,         // 64-bit reg | 
|  | 108 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D3,         // 64-bit reg | 
|  | 109 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D4,         // 64-bit reg | 
|  | 110 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D5,         // 64-bit reg | 
|  | 111 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D6,         // 64-bit reg | 
|  | 112 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D7,         // 64-bit reg | 
|  | 113 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D8,         // 64-bit reg | 
|  | 114 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D9,         // 64-bit reg | 
|  | 115 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D10,        // 64-bit reg | 
|  | 116 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D11,        // 64-bit reg | 
|  | 117 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D12,        // 64-bit reg | 
|  | 118 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D13,        // 64-bit reg | 
|  | 119 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D14,        // 64-bit reg | 
|  | 120 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_D15,        // 64-bit reg | 
|  | 121 | +  RTOS_PLUGIN_CPU_REG_CORTEX_M_NUMREGS | 
|  | 122 | +}; | 
|  | 123 | + | 
|  | 124 | +// | 
|  | 125 | +// RTOS symbols | 
|  | 126 | +// | 
|  | 127 | +typedef struct { | 
|  | 128 | +  const char *name; | 
|  | 129 | +  int optional; | 
|  | 130 | +  U32 address; | 
|  | 131 | +} RTOS_SYMBOLS; | 
|  | 132 | + | 
|  | 133 | +// | 
|  | 134 | +// GDB server functions that can be called by the plugin | 
|  | 135 | +// | 
|  | 136 | +typedef struct { | 
|  | 137 | +  // | 
|  | 138 | +  // API version v1.0 and higher | 
|  | 139 | +  // | 
|  | 140 | +  void  (*pfFree)        (void* p); | 
|  | 141 | +  void* (*pfAlloc)       (unsigned Size); | 
|  | 142 | +  void* (*pfRealloc)     (void* p, unsigned Size); | 
|  | 143 | +  void  (*pfLogOutf)     (const char* sFormat, ...); | 
|  | 144 | +  void  (*pfDebugOutf)   (const char* sFormat, ...); | 
|  | 145 | +  void  (*pfWarnOutf)    (const char* sFormat, ...); | 
|  | 146 | +  void  (*pfErrorOutf)   (const char* sFormat, ...); | 
|  | 147 | +  int   (*pfReadMem)     (U32 Addr, char* pData, unsigned int NumBytes); | 
|  | 148 | +  char  (*pfReadU8)      (U32 Addr, U8* pData); | 
|  | 149 | +  char  (*pfReadU16)     (U32 Addr, U16* pData); | 
|  | 150 | +  char  (*pfReadU32)     (U32 Addr, U32* pData); | 
|  | 151 | +  int   (*pfWriteMem)    (U32 Addr, const char* pData, unsigned NumBytes); | 
|  | 152 | +  void  (*pfWriteU8)     (U32 Addr, U8 Data); | 
|  | 153 | +  void  (*pfWriteU16)    (U32 Addr, U16 Data); | 
|  | 154 | +  void  (*pfWriteU32)    (U32 Addr, U32 Data); | 
|  | 155 | +  U32   (*pfLoad16TE)    (const U8* p); | 
|  | 156 | +  U32   (*pfLoad24TE)    (const U8* p); | 
|  | 157 | +  U32   (*pfLoad32TE)    (const U8* p); | 
|  | 158 | +  // | 
|  | 159 | +  // API version v1.1 and higher | 
|  | 160 | +  // | 
|  | 161 | +  U32   (*pfReadReg)     (U32 RegIndex); | 
|  | 162 | +  void  (*pfWriteReg)    (U32 RegIndex, U32 Value); | 
|  | 163 | +  // | 
|  | 164 | +  // End marker | 
|  | 165 | +  // | 
|  | 166 | +  void   *Dummy; | 
|  | 167 | +} GDB_API; | 
|  | 168 | + | 
|  | 169 | +#if defined(__cplusplus)    // Allow usage of this module from C++ files (disable name mangling) | 
|  | 170 | +  } | 
|  | 171 | +#endif | 
|  | 172 | + | 
|  | 173 | +#endif                      // Avoid multiple inclusion | 
|  | 174 | + | 
|  | 175 | +/*************************** End of file ****************************/ | 
0 commit comments