@@ -133,8 +133,8 @@ static int sja1105_cgu_idiv_config(struct sja1105_private *priv, int port,
133133 idiv .pd = enabled ? 0 : 1 ; /* Power down? */
134134 sja1105_cgu_idiv_packing (packed_buf , & idiv , PACK );
135135
136- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> cgu_idiv [port ],
137- packed_buf , SJA1105_SIZE_CGU_CMD );
136+ return sja1105_write_buf (priv , regs -> cgu_idiv [port ], packed_buf ,
137+ SJA1105_SIZE_CGU_CMD );
138138}
139139
140140static void
@@ -184,8 +184,8 @@ static int sja1105_cgu_mii_tx_clk_config(struct sja1105_private *priv,
184184 mii_tx_clk .pd = 0 ; /* Power Down off => enabled */
185185 sja1105_cgu_mii_control_packing (packed_buf , & mii_tx_clk , PACK );
186186
187- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> mii_tx_clk [port ],
188- packed_buf , SJA1105_SIZE_CGU_CMD );
187+ return sja1105_write_buf (priv , regs -> mii_tx_clk [port ], packed_buf ,
188+ SJA1105_SIZE_CGU_CMD );
189189}
190190
191191static int
@@ -211,8 +211,8 @@ sja1105_cgu_mii_rx_clk_config(struct sja1105_private *priv, int port)
211211 mii_rx_clk .pd = 0 ; /* Power Down off => enabled */
212212 sja1105_cgu_mii_control_packing (packed_buf , & mii_rx_clk , PACK );
213213
214- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> mii_rx_clk [port ],
215- packed_buf , SJA1105_SIZE_CGU_CMD );
214+ return sja1105_write_buf (priv , regs -> mii_rx_clk [port ], packed_buf ,
215+ SJA1105_SIZE_CGU_CMD );
216216}
217217
218218static int
@@ -238,8 +238,8 @@ sja1105_cgu_mii_ext_tx_clk_config(struct sja1105_private *priv, int port)
238238 mii_ext_tx_clk .pd = 0 ; /* Power Down off => enabled */
239239 sja1105_cgu_mii_control_packing (packed_buf , & mii_ext_tx_clk , PACK );
240240
241- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> mii_ext_tx_clk [port ],
242- packed_buf , SJA1105_SIZE_CGU_CMD );
241+ return sja1105_write_buf (priv , regs -> mii_ext_tx_clk [port ], packed_buf ,
242+ SJA1105_SIZE_CGU_CMD );
243243}
244244
245245static int
@@ -265,8 +265,8 @@ sja1105_cgu_mii_ext_rx_clk_config(struct sja1105_private *priv, int port)
265265 mii_ext_rx_clk .pd = 0 ; /* Power Down off => enabled */
266266 sja1105_cgu_mii_control_packing (packed_buf , & mii_ext_rx_clk , PACK );
267267
268- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> mii_ext_rx_clk [port ],
269- packed_buf , SJA1105_SIZE_CGU_CMD );
268+ return sja1105_write_buf (priv , regs -> mii_ext_rx_clk [port ], packed_buf ,
269+ SJA1105_SIZE_CGU_CMD );
270270}
271271
272272static int sja1105_mii_clocking_setup (struct sja1105_private * priv , int port ,
@@ -367,8 +367,8 @@ static int sja1105_cgu_rgmii_tx_clk_config(struct sja1105_private *priv,
367367 txc .pd = 0 ;
368368 sja1105_cgu_mii_control_packing (packed_buf , & txc , PACK );
369369
370- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> rgmii_tx_clk [port ],
371- packed_buf , SJA1105_SIZE_CGU_CMD );
370+ return sja1105_write_buf (priv , regs -> rgmii_tx_clk [port ], packed_buf ,
371+ SJA1105_SIZE_CGU_CMD );
372372}
373373
374374/* AGU */
@@ -418,8 +418,8 @@ static int sja1105_rgmii_cfg_pad_tx_config(struct sja1105_private *priv,
418418 pad_mii_tx .clk_ipud = 2 ; /* TX_CLK input stage (default) */
419419 sja1105_cfg_pad_mii_packing (packed_buf , & pad_mii_tx , PACK );
420420
421- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> pad_mii_tx [port ],
422- packed_buf , SJA1105_SIZE_CGU_CMD );
421+ return sja1105_write_buf (priv , regs -> pad_mii_tx [port ], packed_buf ,
422+ SJA1105_SIZE_CGU_CMD );
423423}
424424
425425static int sja1105_cfg_pad_rx_config (struct sja1105_private * priv , int port )
@@ -454,8 +454,8 @@ static int sja1105_cfg_pad_rx_config(struct sja1105_private *priv, int port)
454454 /* plain input (default) */
455455 sja1105_cfg_pad_mii_packing (packed_buf , & pad_mii_rx , PACK );
456456
457- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> pad_mii_rx [port ],
458- packed_buf , SJA1105_SIZE_CGU_CMD );
457+ return sja1105_write_buf (priv , regs -> pad_mii_rx [port ], packed_buf ,
458+ SJA1105_SIZE_CGU_CMD );
459459}
460460
461461static void
@@ -532,8 +532,8 @@ int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port)
532532 pad_mii_id .txc_pd = 1 ;
533533 sja1105_cfg_pad_mii_id_packing (packed_buf , & pad_mii_id , PACK );
534534
535- rc = sja1105_xfer_buf (priv , SPI_WRITE , regs -> pad_mii_id [port ],
536- packed_buf , SJA1105_SIZE_CGU_CMD );
535+ rc = sja1105_write_buf (priv , regs -> pad_mii_id [port ], packed_buf ,
536+ SJA1105_SIZE_CGU_CMD );
537537 if (rc < 0 )
538538 return rc ;
539539
@@ -548,8 +548,8 @@ int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port)
548548 }
549549 sja1105_cfg_pad_mii_id_packing (packed_buf , & pad_mii_id , PACK );
550550
551- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> pad_mii_id [port ],
552- packed_buf , SJA1105_SIZE_CGU_CMD );
551+ return sja1105_write_buf (priv , regs -> pad_mii_id [port ], packed_buf ,
552+ SJA1105_SIZE_CGU_CMD );
553553}
554554
555555int sja1110_setup_rgmii_delay (const void * ctx , int port )
@@ -579,8 +579,8 @@ int sja1110_setup_rgmii_delay(const void *ctx, int port)
579579
580580 sja1110_cfg_pad_mii_id_packing (packed_buf , & pad_mii_id , PACK );
581581
582- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> pad_mii_id [port ],
583- packed_buf , SJA1105_SIZE_CGU_CMD );
582+ return sja1105_write_buf (priv , regs -> pad_mii_id [port ], packed_buf ,
583+ SJA1105_SIZE_CGU_CMD );
584584}
585585
586586static int sja1105_rgmii_clocking_setup (struct sja1105_private * priv , int port ,
@@ -660,8 +660,8 @@ static int sja1105_cgu_rmii_ref_clk_config(struct sja1105_private *priv,
660660 ref_clk .pd = 0 ; /* Power Down off => enabled */
661661 sja1105_cgu_mii_control_packing (packed_buf , & ref_clk , PACK );
662662
663- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> rmii_ref_clk [port ],
664- packed_buf , SJA1105_SIZE_CGU_CMD );
663+ return sja1105_write_buf (priv , regs -> rmii_ref_clk [port ], packed_buf ,
664+ SJA1105_SIZE_CGU_CMD );
665665}
666666
667667static int
@@ -680,8 +680,8 @@ sja1105_cgu_rmii_ext_tx_clk_config(struct sja1105_private *priv, int port)
680680 ext_tx_clk .pd = 0 ; /* Power Down off => enabled */
681681 sja1105_cgu_mii_control_packing (packed_buf , & ext_tx_clk , PACK );
682682
683- return sja1105_xfer_buf (priv , SPI_WRITE , regs -> rmii_ext_tx_clk [port ],
684- packed_buf , SJA1105_SIZE_CGU_CMD );
683+ return sja1105_write_buf (priv , regs -> rmii_ext_tx_clk [port ], packed_buf ,
684+ SJA1105_SIZE_CGU_CMD );
685685}
686686
687687static int sja1105_cgu_rmii_pll_config (struct sja1105_private * priv )
@@ -712,8 +712,8 @@ static int sja1105_cgu_rmii_pll_config(struct sja1105_private *priv)
712712 pll .pd = 0x1 ;
713713
714714 sja1105_cgu_pll_control_packing (packed_buf , & pll , PACK );
715- rc = sja1105_xfer_buf (priv , SPI_WRITE , regs -> rmii_pll1 , packed_buf ,
716- SJA1105_SIZE_CGU_CMD );
715+ rc = sja1105_write_buf (priv , regs -> rmii_pll1 , packed_buf ,
716+ SJA1105_SIZE_CGU_CMD );
717717 if (rc < 0 ) {
718718 dev_err (dev , "failed to configure PLL1 for 50MHz\n" );
719719 return rc ;
@@ -723,8 +723,8 @@ static int sja1105_cgu_rmii_pll_config(struct sja1105_private *priv)
723723 pll .pd = 0x0 ;
724724
725725 sja1105_cgu_pll_control_packing (packed_buf , & pll , PACK );
726- rc = sja1105_xfer_buf (priv , SPI_WRITE , regs -> rmii_pll1 , packed_buf ,
727- SJA1105_SIZE_CGU_CMD );
726+ rc = sja1105_write_buf (priv , regs -> rmii_pll1 , packed_buf ,
727+ SJA1105_SIZE_CGU_CMD );
728728 if (rc < 0 ) {
729729 dev_err (dev , "failed to enable PLL1\n" );
730730 return rc ;
@@ -847,14 +847,14 @@ int sja1110_disable_microcontroller(struct sja1105_private *priv)
847847 /* Power down the BASE_TIMER_CLK to disable the watchdog timer */
848848 sja1110_cgu_outclk_packing (packed_buf , & outclk_7_c , PACK );
849849
850- rc = sja1105_xfer_buf (priv , SPI_WRITE , SJA1110_BASE_TIMER_CLK ,
851- packed_buf , SJA1105_SIZE_CGU_CMD );
850+ rc = sja1105_write_buf (priv , SJA1110_BASE_TIMER_CLK , packed_buf ,
851+ SJA1105_SIZE_CGU_CMD );
852852 if (rc )
853853 return rc ;
854854
855855 /* Power down the BASE_MCSS_CLOCK to gate the microcontroller off */
856856 sja1110_cgu_outclk_packing (packed_buf , & outclk_6_c , PACK );
857857
858- return sja1105_xfer_buf (priv , SPI_WRITE , SJA1110_BASE_MCSS_CLK ,
859- packed_buf , SJA1105_SIZE_CGU_CMD );
858+ return sja1105_write_buf (priv , SJA1110_BASE_MCSS_CLK , packed_buf ,
859+ SJA1105_SIZE_CGU_CMD );
860860}
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