Merge pull request #3081 from AlexandreSinger/feature-include-cleanup

[Infra] Cleaned Up Includes in Non-External Libs

Author: AlexandreSinger

libs/libarchfpga/src/arch_check.cpp

@@ -1,5 +1,7 @@
 #include <set>
+#include <sstream>
 
+#include "arch_util.h"
 #include "logic_types.h"
 #include "vtr_log.h"
 #include "arch_error.h"

libs/libarchfpga/src/arch_check.h

@@ -1,5 +1,4 @@
-#ifndef ARCH_CHECK_H
-#define ARCH_CHECK_H
+#pragma once
 
 /**
  *  This file includes all the definitions of functions which purpose is to
@@ -8,12 +7,9 @@
  *  All new functions corresponding to the architecture checking should end up here.
  */
 
-#include "arch_types.h"
-#include "arch_util.h"
-
-#include "physical_types_util.h"
-
-#include "vtr_util.h"
+#include <stdint.h>
+#include "logic_types.h"
+#include "physical_types.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -76,5 +72,3 @@ void check_models(t_arch* arch);
 #ifdef __cplusplus
 }
 #endif
-
-#endif

libs/libarchfpga/src/arch_error.h

@@ -1,5 +1,4 @@
-#ifndef ARCH_ERROR_H
-#define ARCH_ERROR_H
+#pragma once
 
 #include "vtr_error.h"
 #include <cstdarg>
@@ -14,5 +13,3 @@ class ArchFpgaError : public vtr::VtrError {
     ArchFpgaError(std::string msg = "", std::string new_filename = "", size_t new_linenumber = -1)
         : vtr::VtrError(msg, new_filename, new_linenumber) {}
 };
-
-#endif

libs/libarchfpga/src/arch_types.h

@@ -1,17 +1,11 @@
+#pragma once
 /*
  * Data types describing the FPGA architecture.
  *
  * Date: February 19, 2009
  * Authors: Jason Luu and Kenneth Kent
  */
 
-#ifndef ARCH_TYPES_H
-#define ARCH_TYPES_H
-
-#include "logic_types.h"
-#include "physical_types.h"
-#include "cad_types.h"
-
 /* Input file parsing. */
 #define TOKENS " \t\n"
 
@@ -25,5 +19,3 @@ enum class e_arch_format {
     VTR,            ///<VTR-specific device XML format
     FPGAInterchange ///<FPGA Interchange device format
 };
-
-#endif

libs/libarchfpga/src/arch_util.h

@@ -1,7 +1,5 @@
-#ifndef ARCH_UTIL_H
-#define ARCH_UTIL_H
+#pragma once
 
-#include <regex>
 #include <unordered_set>
 #include "physical_types.h"
 
@@ -114,4 +112,3 @@ void link_physical_logical_types(std::vector<t_physical_tile_type>& PhysicalTile
                                  std::vector<t_logical_block_type>& LogicalBlockTypes);
 
 void setup_pin_classes(t_physical_tile_type* type);
-#endif

libs/libarchfpga/src/cad_types.h

@@ -1,10 +1,8 @@
+#pragma once
 /*
  * Data types used to give architectural hints for the CAD algorithm
  */
-#ifndef CAD_TYPES_H
-#define CAD_TYPES_H
 
-#include "logic_types.h"
 #include "physical_types.h"
 
 struct t_pack_pattern_connections;
@@ -128,5 +126,3 @@ struct t_cluster_placement_primitive {
     float base_cost;        /* cost independent of current status of packing */
     float incremental_cost; /* cost dependent on current status of packing */
 };
-
-#endif

libs/libarchfpga/src/clock_types.h

@@ -1,8 +1,6 @@
-#ifndef CLOCK_TYPES_H
-#define CLOCK_TYPES_H
+#pragma once
 
 #include <string>
-#include <vector>
 
 enum class e_clock_type {
     SPINE,
@@ -59,5 +57,3 @@ struct t_clock_connection_arch {
     std::string locationy;
     float fc;
 };
-
-#endif

libs/libarchfpga/src/device_grid.h

@@ -1,5 +1,4 @@
-#ifndef DEVICE_GRID
-#define DEVICE_GRID
+#pragma once
 
 #include <string>
 #include <vector>
@@ -149,5 +148,3 @@ class DeviceGrid {
 
     std::vector<t_logical_block_type_ptr> limiting_resources_;
 };
-
-#endif

libs/libarchfpga/src/echo_arch.h

@@ -1,11 +1,9 @@
-#ifndef ECHO_ARCH_H
-#define ECHO_ARCH_H
+#pragma once
 
-#include "arch_types.h"
+#include <vector>
+#include "physical_types.h"
 
 void EchoArch(const char* EchoFile,
               const std::vector<t_physical_tile_type>& PhysicalTileTypes,
               const std::vector<t_logical_block_type>& LogicalBlockTypes,
               const t_arch* arch);
-
-#endif

libs/libarchfpga/src/histogram.cpp

@@ -1,6 +1,5 @@
 #include <algorithm>
 #include <string>
-#include <sstream>
 #include <cmath>
 
 #include "vtr_log.h"