fix qei arr

Author: burrbull

Cargo.toml

@@ -412,7 +412,7 @@ required-features = ["gpiod", "rtic"] # stm32f407
 
 [[example]]
 name = "rtic-tick"
-required-features = ["gpiod", "rtic"]
+required-features = ["rtic"]
 
 [[example]]
 name = "adc_dma_rtic"

src/qei.rs

@@ -97,7 +97,8 @@ macro_rules! hal {
                     // some chip variants declare `.bits()` as unsafe, some don't
                     #[allow(unused_unsafe)]
                     self.smcr.write(|w| unsafe { w.sms().bits(3) });
-                    self.arr.write(|w| unsafe { w.bits(core::u32::MAX) });
+                    #[allow(unused_unsafe)]
+                    self.arr.write(|w| unsafe { w.bits($bits::MAX as u32) });
                     self.cr1.write(|w| w.cen().set_bit());
                 }
 

src/timer.rs

@@ -15,6 +15,7 @@ use crate::rcc::{self, Clocks};
 use crate::time::Hertz;
 
 #[cfg(feature = "rtic")]
+#[cfg(not(feature = "stm32f410"))]
 pub mod monotonic;
 
 /// Timer wrapper