DT Based Implementation of GetPerformanceCounterProperties ()

EmbeddedPkg/EmbeddedPkg.dec

@@ -53,8 +53,6 @@
   ## FDT Configuration Table
   # Include/Guid/Fdt.h
   gFdtTableGuid = { 0xb1b621d5, 0xf19c, 0x41a5, { 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0 } }
-  # Include/Guid/FdtHob.h
-  gFdtHobGuid   = { 0x16958446, 0x19B7, 0x480B, { 0xB0, 0x47, 0x74, 0x85, 0xAD, 0x3F, 0x71, 0x6D } }
   gFdtVariableGuid = { 0x25a4fd4a, 0x9703, 0x4ba9, { 0xa1, 0x90, 0xb7, 0xc8, 0x4e, 0xfb, 0x3e, 0x57 } }
 
   ## Include/Guid/PlatformHasDeviceTree.h

MdePkg/MdePkg.dec

@@ -608,6 +608,9 @@
   ## Include/Protocol/UserManager.h
   gEfiUserInfoAccessSetupRestrictedGuid = { 0xbdb38125, 0x4d63, 0x49f4, { 0x82, 0x12, 0x61, 0xcf, 0x5a, 0x19, 0xa, 0xf8 }}
 
+  ## Include/Guid/FdtHob.h
+  gFdtHobGuid   = { 0x16958446, 0x19B7, 0x480B, { 0xB0, 0x47, 0x74, 0x85, 0xAD, 0x3F, 0x71, 0x6D } }
+
   ## Include/Guid/ImageAuthentication.h
   gEfiImageSecurityDatabaseGuid  = { 0xd719b2cb, 0x3d3a, 0x4596, {0xa3, 0xbc, 0xda, 0xd0,  0xe, 0x67, 0x65, 0x6f }}
   gEfiCertSha256Guid             = { 0xc1c41626, 0x504c, 0x4092, {0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28 }}

OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc

@@ -93,7 +93,7 @@
   DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
 
   # Flattened Device Tree (FDT) access library
-  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+  FdtLib|MdePkg/Library/BaseFdtLib/BaseFdtLib.inf
 
   # PCI Libraries
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf

OvmfPkg/RiscVVirt/RiscVVirt.fdf.inc

@@ -34,6 +34,5 @@ DEFINE VARS_FTW_WORKING_SIZE         = 0x00040000
 DEFINE VARS_FTW_SPARE_OFFSET         = $(VARS_FTW_WORKING_OFFSET) + $(VARS_FTW_WORKING_SIZE)
 DEFINE VARS_FTW_SPARE_SIZE           = 0x00040000
 
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency = 10000000
 SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase = 0x83FF0000
 SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize = 0x00010000

UefiCpuPkg/CpuDxeRiscV64/CpuDxe.c

@@ -269,7 +269,7 @@ CpuGetTimerValue (
   if (TimerPeriod != NULL) {
     *TimerPeriod = DivU64x32 (
                      1000000000000000u,
-                     PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+                     GetPerformanceCounterProperties (NULL,NULL)
                      );
   }
 

UefiCpuPkg/CpuDxeRiscV64/CpuDxe.h

@@ -17,6 +17,7 @@
 #include <Library/BaseRiscVFpuLib.h>
 #include <Library/BaseRiscVSbiLib.h>
 #include <Library/BaseRiscVMmuLib.h>
+#include <Library/TimerLib.h>
 #include <Library/BaseLib.h>
 #include <Library/CacheMaintenanceLib.h>
 #include <Library/CpuExceptionHandlerLib.h>

UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf

@@ -40,6 +40,7 @@
   RiscVMmuLib
   RiscVFpuLib
   CacheMaintenanceLib
+  TimerLib
 
 [Sources]
   CpuDxe.c
@@ -62,7 +63,6 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask    ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList              ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize                    ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency             ## CONSUMES
 
 [Depex]
   TRUE

UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf

@@ -32,6 +32,7 @@
   CpuLib
   UefiBootServicesTableLib
   UefiDriverEntryPoint
+  TimerLib
 
 [LibraryClasses.RISCV64]
   RiscVSbiLib
@@ -42,7 +43,6 @@
 
 [Pcd]
   gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride           ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
 
 [Protocols]
   gEfiCpuArchProtocolGuid       ## CONSUMES

UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c

@@ -10,6 +10,7 @@
 #include <Library/BaseLib.h>
 #include <Library/BaseRiscVSbiLib.h>
 #include <Library/UefiLib.h>
+#include <Library/TimerLib.h>
 #include "Timer.h"
 
 //
@@ -114,7 +115,7 @@ TimerInterruptHandler (
     mTimerNotifyFunction (
       DivU64x32 (
         EFI_TIMER_PERIOD_SECONDS (PeriodStart - mLastPeriodStart),
-        PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+        GetPerformanceCounterProperties (NULL,NULL)
         )
       );
   }
@@ -129,7 +130,7 @@ TimerInterruptHandler (
   PeriodStart     += DivU64x32 (
                        MultU64x32 (
                          mTimerPeriod,
-                         PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+                         GetPerformanceCounterProperties (NULL,NULL)
                          ),
                        1000000u
                        );  // convert to tick
@@ -232,7 +233,7 @@ TimerDriverSetTimerPeriod (
   PeriodStart     += DivU64x32 (
                        MultU64x32 (
                          mTimerPeriod,
-                         PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+                         GetPerformanceCounterProperties (NULL,NULL)
                          ),
                        1000000u
                        ); // convert to tick

UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf

@@ -28,6 +28,8 @@
   BaseLib
   PcdLib
   DebugLib
+  FdtLib
+  HobLib
 
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
+[Guids]
+  gFdtHobGuid

UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/CpuTimerLib.c

@@ -12,6 +12,13 @@
 #include <Library/DebugLib.h>
 #include <Library/PcdLib.h>
 #include <Register/RiscV64/RiscVImpl.h>
+#include <Pi/PiBootMode.h>
+#include <Pi/PiHob.h>
+#include <Library/HobLib.h>
+#include <Library/FdtLib.h>
+
+// Timer base retrieved from DT
+STATIC UINT64  mTimeBase;
 
 /**
   Stalls the CPU for at least the given number of ticks.
@@ -57,7 +64,7 @@ MicroSecondDelay (
     DivU64x32 (
       MultU64x32 (
         MicroSeconds,
-        PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+        mTimeBase
         ),
       1000000u
       )
@@ -85,7 +92,7 @@ NanoSecondDelay (
     DivU64x32 (
       MultU64x32 (
         NanoSeconds,
-        PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+        mTimeBase
         ),
       1000000000u
       )
@@ -152,7 +159,47 @@ GetPerformanceCounterProperties (
     *EndValue = 32 - 1;
   }
 
-  return PcdGet64 (PcdCpuCoreCrystalClockFrequency);
+  if (mTimeBase != 0) {
+    return mTimeBase;
+  }
+  //
+  // Locate the FDT HOB and validate header
+  //
+  CONST EFI_HOB_GUID_TYPE  *Hob = GetFirstGuidHob (&gFdtHobGuid);
+
+  ASSERT (Hob != NULL);
+
+  CONST VOID  *DeviceTreeBase =
+    (CONST VOID *)(UINTN)*(CONST UINT64 *)GET_GUID_HOB_DATA (Hob);
+
+  ASSERT (FdtCheckHeader (DeviceTreeBase) == 0);
+
+  //
+  // /cpus node
+  //
+  INT32  Node = FdtSubnodeOffsetNameLen (
+                  DeviceTreeBase,
+                  0,
+                  "cpus",
+                  sizeof ("cpus") - 1
+                  );
+
+  ASSERT (Node >= 0);
+
+  //
+  // timebase-frequency property
+  //
+  INT32               Len;
+  CONST FDT_PROPERTY  *Prop =
+    FdtGetProperty (DeviceTreeBase, Node, "timebase-frequency", &Len);
+
+  ASSERT (Prop != NULL && Len == sizeof (UINT32));
+
+  //
+  // Device-tree cells are big-endian
+  //
+  mTimeBase = SwapBytes32 (*(CONST UINT32 *)Prop->Data);
+  return mTimeBase;
 }
 
 /**
@@ -180,13 +227,13 @@ GetTimeInNanoSecond (
   // Time = --------- x 1,000,000,000
   //        Frequency
   //
-  NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, PcdGet64 (PcdCpuCoreCrystalClockFrequency), &Remainder), 1000000000u);
+  NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, mTimeBase, &Remainder), 1000000000u);
 
   //
   // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)
   // will not overflow 64-bit.
   //
-  NanoSeconds += DivU64x32 (MultU64x32 ((UINT64)Remainder, 1000000000u), PcdGet64 (PcdCpuCoreCrystalClockFrequency));
+  NanoSeconds += DivU64x32 (MultU64x32 ((UINT64)Remainder, 1000000000u), mTimeBase);
 
   return NanoSeconds;
 }