[Intel-SIG] Intel new platform ClearWater Forest support including CPU model/new ISAs and its dependency #71
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commit 24d74b9 upstream. AVX-VNNI-INT8 is a new set of instructions in the latest Intel platform Sierra Forest, aims for the platform to have superior AI capabilities. This instruction multiplies the individual bytes of two unsigned or unsigned source operands, then adds and accumulates the results into the destination dword element size operand. The bit definition: CPUID.(EAX=7,ECX=1):EDX[bit 4] AVX-VNNI-INT8 is on a new and sparse CPUID leaf and all bits on this leaf have no truly kernel use case for now. Given that and to save space for kernel feature bits, move this new leaf to KVM-only subleaf and plus an x86_FEATURE definition for AVX-VNNI-INT8 to direct it to the KVM entry. Advertise AVX-VNNI-INT8 to KVM userspace. This is safe because there are no new VMX controls or additional host enabling required for guests to use this feature. Intel-SIG: commit 24d74b9 KVM: x86: Advertise AVX-VNNI-INT8 CPUID to user space. ClearWater support including CPU model and new ISAs and its dependency Signed-off-by: Jiaxi Chen <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]> [ Quanxian Wang: amend commit log ] Signed-off-by: Quanxian Wang <[email protected]>
commit 090e3be upstream. Server product based on the Atom Darkmont core. Intel-SIG: commit 090e3be x86/cpu: Add model number for Intel Clearwater Forest processor. ClearWater support including CPU model and new ISAs and its dependency Signed-off-by: Tony Luck <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected] [ Quanxian Wang: amend commit log ] Signed-off-by: Quanxian Wang <[email protected]>
commit a0423af92cb31e6fc4f53ef9b6e19fdf08ad4395 upstream. Latest Intel platform Clearwater Forest has introduced new instructions enumerated by CPUIDs of SHA512, SM3, SM4 and AVX-VNNI-INT16. Advertise these CPUIDs to userspace so that guests can query them directly. SHA512, SM3 and SM4 are on an expected-dense CPUID leaf and some other bits on this leaf have kernel usages. Considering they have not truly kernel usages, hide them in /proc/cpuinfo. These new instructions only operate in xmm, ymm registers and have no new VMX controls, so there is no additional host enabling required for guests to use these instructions, i.e. advertising these CPUIDs to userspace is safe. Intel-SIG: commit a0423af92cb3 x86: KVM: Advertise CPUIDs for new instructions in Clearwater Forest. ClearWater support including CPU model and new ISAs and its dependency Tested-by: Jiaan Lu <[email protected]> Tested-by: Xuelian Guo <[email protected]> Signed-off-by: Tao Su <[email protected]> Message-ID: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]> [ Quanxian Wang: amend commit log ] Signed-off-by: Quanxian Wang <[email protected]>
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….15-velinux Note: this PR depends on openvelinux#71, openvelinux#72 is rebased on openvelinux#71 for testing. These patches series are to backport new Intel CPU family model definition (IFM), only on common parts and PMU special. Other modules will be update by domain owner when they use new definition. old/new definition co-exists at the same time. we will find a good chance to remove old definition when all are ready. there are 8 commits: Common(7): 34b3fc5,x86/cpu/intel: Drop stray FAM6 check with new Intel CPU model defines,2024-06-29 16:10:37,Andrew Cooper [email protected],v6.11-rc1 6568fc1,x86/cpu/intel: Switch to new Intel CPU model defines,2024-05-28 10:59:02,Tony Luck [email protected],v6.11-rc1 744866f,x86/cpu: Switch to new Intel CPU model defines,2024-05-28 10:59:03,Tony Luck [email protected],v6.11-rc1 f055b62,x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h,2024-04-16 14:19:05,Tony Luck [email protected],v6.10-rc1 e6dfdc2,x86/cpu/vfm: Add new macros to work with (vendor/family/model) values,2024-04-16 14:19:04,Tony Luck [email protected],v6.10-rc1 a9d0adc,x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86,2024-04-16 14:19:03,Tony Luck [email protected],v6.10-rc1 8a8a9c9,x86/cpu: Add model number for another Intel Arrow Lake mobile processor,2024-03-24 04:08:10,Tony Luck [email protected],v6.9-rc1 PMU special (1) d142df1,perf/x86/intel: Switch to new Intel CPU model defines,2024-05-28 10:59:02,Tony Luck [email protected],v6.11-rc1 Testing: Build / Boot PASS on CWF platform
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Contents:
090e3be,x86/cpu: Add model number for Intel Clearwater Forest processor,2024-01-17 11:18:44,Tony Luck [email protected],v6.8-rc2
a0423af92cb3,x86: KVM: Advertise CPUIDs for new instructions in Clearwater Forest,2024-11-05 13:48:25,Tao Su [email protected],v6.13-rc1
24d74b9,KVM: x86: Advertise AVX-VNNI-INT8 CPUID to user space,2022-11-28 13:33:28,Jiaxi Chen [email protected],v6.2-rc1 (depenency)