@@ -6,7 +6,6 @@ use std::fmt;
66def_reg_class ! {
77 Arm ArmInlineAsmRegClass {
88 reg,
9- reg_thumb,
109 sreg,
1110 sreg_low16,
1211 dreg,
@@ -47,7 +46,7 @@ impl ArmInlineAsmRegClass {
4746 _arch : InlineAsmArch ,
4847 ) -> & ' static [ ( InlineAsmType , Option < & ' static str > ) ] {
4948 match self {
50- Self :: reg | Self :: reg_thumb => types ! { _: I8 , I16 , I32 , F32 ; } ,
49+ Self :: reg => types ! { _: I8 , I16 , I32 , F32 ; } ,
5150 Self :: sreg | Self :: sreg_low16 => types ! { "vfp2" : I32 , F32 ; } ,
5251 Self :: dreg | Self :: dreg_low16 | Self :: dreg_low8 => types ! {
5352 "vfp2" : I64 , F64 , VecI8 ( 8 ) , VecI16 ( 4 ) , VecI32 ( 2 ) , VecI64 ( 1 ) , VecF32 ( 2 ) ;
@@ -88,20 +87,32 @@ fn frame_pointer_r7(
8887 }
8988}
9089
90+ fn not_thumb1 (
91+ _arch : InlineAsmArch ,
92+ mut has_feature : impl FnMut ( & str ) -> bool ,
93+ _target : & Target ,
94+ ) -> Result < ( ) , & ' static str > {
95+ if has_feature ( "thumb-mode" ) && !has_feature ( "thumb2" ) {
96+ Err ( "high registers (r8+) cannot be used in Thumb-1 code" )
97+ } else {
98+ Ok ( ( ) )
99+ }
100+ }
101+
91102def_regs ! {
92103 Arm ArmInlineAsmReg ArmInlineAsmRegClass {
93- r0: reg, reg_thumb = [ "r0" , "a1" ] ,
94- r1: reg, reg_thumb = [ "r1" , "a2" ] ,
95- r2: reg, reg_thumb = [ "r2" , "a3" ] ,
96- r3: reg, reg_thumb = [ "r3" , "a4" ] ,
97- r4: reg, reg_thumb = [ "r4" , "v1" ] ,
98- r5: reg, reg_thumb = [ "r5" , "v2" ] ,
99- r7: reg, reg_thumb = [ "r7" , "v4" ] % frame_pointer_r7,
100- r8: reg = [ "r8" , "v5" ] ,
101- r10: reg = [ "r10" , "sl" ] ,
104+ r0: reg = [ "r0" , "a1" ] ,
105+ r1: reg = [ "r1" , "a2" ] ,
106+ r2: reg = [ "r2" , "a3" ] ,
107+ r3: reg = [ "r3" , "a4" ] ,
108+ r4: reg = [ "r4" , "v1" ] ,
109+ r5: reg = [ "r5" , "v2" ] ,
110+ r7: reg = [ "r7" , "v4" ] % frame_pointer_r7,
111+ r8: reg = [ "r8" , "v5" ] % not_thumb1 ,
112+ r10: reg = [ "r10" , "sl" ] % not_thumb1 ,
102113 r11: reg = [ "r11" , "fp" ] % frame_pointer_r11,
103- r12: reg = [ "r12" , "ip" ] ,
104- r14: reg = [ "r14" , "lr" ] ,
114+ r12: reg = [ "r12" , "ip" ] % not_thumb1 ,
115+ r14: reg = [ "r14" , "lr" ] % not_thumb1 ,
105116 s0: sreg, sreg_low16 = [ "s0" ] ,
106117 s1: sreg, sreg_low16 = [ "s1" ] ,
107118 s2: sreg, sreg_low16 = [ "s2" ] ,
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