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[LLD][RISCV] Fix incorrect call relaxation when mixing +c and -c objects #73977

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Merged
merged 3 commits into from
Dec 1, 2023
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[LLD][RISCV] Fix incorrect call relaxation when mixing +c and -c objects #73977

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8de61cc
[LLD][RISCV] Add test case showing incorrect call relaxation
preames Nov 30, 2023
56e2160
[LLD][RISCV] Fix incorrect call relaxation when mixing +c and -c objects
preames Nov 30, 2023
969b6b9
Address review comments on test
preames Dec 1, 2023
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2 changes: 1 addition & 1 deletion lld/ELF/Arch/RISCV.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -591,7 +591,7 @@ static void initSymbolAnchors() {
// Relax R_RISCV_CALL/R_RISCV_CALL_PLT auipc+jalr to c.j, c.jal, or jal.
static void relaxCall(const InputSection &sec, size_t i, uint64_t loc,
Relocation &r, uint32_t &remove) {
const bool rvc = config->eflags & EF_RISCV_RVC;
const bool rvc = getEFlags(sec.file) & EF_RISCV_RVC;
const Symbol &sym = *r.sym;
const uint64_t insnPair = read64le(sec.content().data() + r.offset);
const uint32_t rd = extractBits(insnPair, 32 + 11, 32 + 7);
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30 changes: 30 additions & 0 deletions lld/test/ELF/riscv-relax-call-mixed-rvc.s
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@@ -0,0 +1,30 @@
# REQUIRES: riscv
# RUN: rm -rf %t && split-file %s %t && cd %t
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+c,+relax a.s -o a.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=-c,+relax b.s -o b.o

# RUN: ld.lld a.o b.o --shared -o a
# RUN: llvm-objdump -d --no-show-raw-insn -M no-aliases a | FileCheck %s

## This needs to be a *uncompressed* jal instruction since it came from the
## source file which does not enable C
# CHECK-LABEL: <foo>:
# CHECK-NEXT: 1260: jal zero, 0x1260 <foo>
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@MaskRay MaskRay Dec 1, 2023

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Omit 1260: so that the test is less sensitive to address changes.

jal zero, {{.*}} <foo>

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@preames preames Dec 1, 2023

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I need the addresses to make the instruction size difference obvious. Is there a way to force the address so it's stable instead?

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@MaskRay MaskRay Dec 1, 2023

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Consider -Ttext=0x10000 as many riscv-relax-* files use.

# CHECK-NEXT: 1264: addi zero, zero, 0

# w/C
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@MaskRay MaskRay Dec 1, 2023

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Missing space? w/ C

#--- a.s
.text
.attribute 4, 16
.attribute 5, "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0"

# w/o C
#--- b.s
.text
.attribute 4, 16
.attribute 5, "rv64i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0"
.p2align 5
.type foo,@function
foo:
tail foo
nop
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@MaskRay MaskRay Dec 1, 2023

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Relaxations may create NOPs as well. Consider a different instruction.

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@preames preames Dec 1, 2023

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Do you have a specific suggestion? I don't really see why I care that a nop could be produced by relaxation since I'm testing one particular case here, but I'm happy to adjust to your preference.

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@MaskRay MaskRay Dec 1, 2023

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This is quite nitpicking. R_RISCV_ALIGN handling adjusts NOPs, so a nop in the check prefix isn't immediately clear it is related to user input or R_RISCV_ALIGN related nops. Switching to another instruction makes the intention clearer.