diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp index bdfffc475c90a..2a80296688744 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp @@ -532,21 +532,15 @@ void AMDGPUInstPrinter::printDefaultVccOperand(bool FirstOperand, void AMDGPUInstPrinter::printWaitVDST(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O) { - uint8_t Imm = MI->getOperand(OpNo).getImm(); - if (Imm != 0) { - O << " wait_vdst:"; - printU4ImmDecOperand(MI, OpNo, O); - } + O << " wait_vdst:"; + printU4ImmDecOperand(MI, OpNo, O); } void AMDGPUInstPrinter::printWaitEXP(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O) { - uint8_t Imm = MI->getOperand(OpNo).getImm(); - if (Imm != 0) { - O << " wait_exp:"; - printU4ImmDecOperand(MI, OpNo, O); - } + O << " wait_exp:"; + printU4ImmDecOperand(MI, OpNo, O); } bool AMDGPUInstPrinter::needsImpliedVcc(const MCInstrDesc &Desc, diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s b/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s index 8a8daab9a3a7e..9b1ba24053816 100644 --- a/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s +++ b/llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s @@ -46,10 +46,10 @@ lds_direct_load v15 wait_vdst:1 // GFX11: lds_direct_load v15 wait_vdst:1 ; encoding: [0x0f,0x00,0x11,0xce] lds_direct_load v16 wait_vdst:0 -// GFX11: lds_direct_load v16 ; encoding: [0x10,0x00,0x10,0xce] +// GFX11: lds_direct_load v16 wait_vdst:0 ; encoding: [0x10,0x00,0x10,0xce] lds_direct_load v17 -// GFX11: lds_direct_load v17 ; encoding: [0x11,0x00,0x10,0xce] +// GFX11: lds_direct_load v17 wait_vdst:0 ; encoding: [0x11,0x00,0x10,0xce] lds_param_load v1, attr0.x wait_vdst:15 // GFX11: lds_param_load v1, attr0.x wait_vdst:15 ; encoding: [0x01,0x00,0x0f,0xce] diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s index 0a3396b454b9c..e2e53776783f3 100644 --- a/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s +++ b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s @@ -1,31 +1,31 @@ // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck -check-prefix=GFX11 %s v_interp_p10_f32 v0, v1, v2, v3 -// GFX11: v_interp_p10_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f32 v1, v10, v20, v30 -// GFX11: v_interp_p10_f32 v1, v10, v20, v30 ; encoding: [0x01,0x00,0x00,0xcd,0x0a,0x29,0x7a,0x04] +// GFX11: v_interp_p10_f32 v1, v10, v20, v30 wait_exp:0 ; encoding: [0x01,0x00,0x00,0xcd,0x0a,0x29,0x7a,0x04] v_interp_p10_f32 v2, v11, v21, v31 -// GFX11: v_interp_p10_f32 v2, v11, v21, v31 ; encoding: [0x02,0x00,0x00,0xcd,0x0b,0x2b,0x7e,0x04] +// GFX11: v_interp_p10_f32 v2, v11, v21, v31 wait_exp:0 ; encoding: [0x02,0x00,0x00,0xcd,0x0b,0x2b,0x7e,0x04] v_interp_p10_f32 v3, v12, v22, v32 -// GFX11: v_interp_p10_f32 v3, v12, v22, v32 ; encoding: [0x03,0x00,0x00,0xcd,0x0c,0x2d,0x82,0x04] +// GFX11: v_interp_p10_f32 v3, v12, v22, v32 wait_exp:0 ; encoding: [0x03,0x00,0x00,0xcd,0x0c,0x2d,0x82,0x04] v_interp_p10_f32 v0, v1, v2, v3 clamp -// GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp ; encoding: [0x00,0x80,0x00,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp wait_exp:0 ; encoding: [0x00,0x80,0x00,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f32 v0, -v1, v2, v3 -// GFX11: v_interp_p10_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x24] +// GFX11: v_interp_p10_f32 v0, -v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x24] v_interp_p10_f32 v0, v1, -v2, v3 -// GFX11: v_interp_p10_f32 v0, v1, -v2, v3 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x44] +// GFX11: v_interp_p10_f32 v0, v1, -v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x44] v_interp_p10_f32 v0, v1, v2, -v3 -// GFX11: v_interp_p10_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x84] +// GFX11: v_interp_p10_f32 v0, v1, v2, -v3 wait_exp:0 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x84] v_interp_p10_f32 v0, v1, v2, v3 wait_exp:0 -// GFX11: v_interp_p10_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f32 v0, v1, v2, v3 wait_exp:1 // GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:1 ; encoding: [0x00,0x01,0x00,0xcd,0x01,0x05,0x0e,0x04] @@ -37,31 +37,31 @@ v_interp_p10_f32 v0, v1, v2, v3 clamp wait_exp:7 // GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp wait_exp:7 ; encoding: [0x00,0x87,0x00,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f32 v0, v1, v2, v3 -// GFX11: v_interp_p2_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f32 v1, v10, v20, v30 -// GFX11: v_interp_p2_f32 v1, v10, v20, v30 ; encoding: [0x01,0x00,0x01,0xcd,0x0a,0x29,0x7a,0x04] +// GFX11: v_interp_p2_f32 v1, v10, v20, v30 wait_exp:0 ; encoding: [0x01,0x00,0x01,0xcd,0x0a,0x29,0x7a,0x04] v_interp_p2_f32 v2, v11, v21, v31 -// GFX11: v_interp_p2_f32 v2, v11, v21, v31 ; encoding: [0x02,0x00,0x01,0xcd,0x0b,0x2b,0x7e,0x04] +// GFX11: v_interp_p2_f32 v2, v11, v21, v31 wait_exp:0 ; encoding: [0x02,0x00,0x01,0xcd,0x0b,0x2b,0x7e,0x04] v_interp_p2_f32 v3, v12, v22, v32 -// GFX11: v_interp_p2_f32 v3, v12, v22, v32 ; encoding: [0x03,0x00,0x01,0xcd,0x0c,0x2d,0x82,0x04] +// GFX11: v_interp_p2_f32 v3, v12, v22, v32 wait_exp:0 ; encoding: [0x03,0x00,0x01,0xcd,0x0c,0x2d,0x82,0x04] v_interp_p2_f32 v0, v1, v2, v3 clamp -// GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp ; encoding: [0x00,0x80,0x01,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp wait_exp:0 ; encoding: [0x00,0x80,0x01,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f32 v0, -v1, v2, v3 -// GFX11: v_interp_p2_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x24] +// GFX11: v_interp_p2_f32 v0, -v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x24] v_interp_p2_f32 v0, v1, -v2, v3 -// GFX11: v_interp_p2_f32 v0, v1, -v2, v3 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x44] +// GFX11: v_interp_p2_f32 v0, v1, -v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x44] v_interp_p2_f32 v0, v1, v2, -v3 -// GFX11: v_interp_p2_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x84] +// GFX11: v_interp_p2_f32 v0, v1, v2, -v3 wait_exp:0 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x84] v_interp_p2_f32 v0, v1, v2, v3 wait_exp:0 -// GFX11: v_interp_p2_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f32 v0, v1, v2, v3 wait_exp:1 // GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:1 ; encoding: [0x00,0x01,0x01,0xcd,0x01,0x05,0x0e,0x04] @@ -73,22 +73,22 @@ v_interp_p2_f32 v0, v1, v2, v3 clamp wait_exp:7 // GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp wait_exp:7 ; encoding: [0x00,0x87,0x01,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, -v1, v2, v3 -// GFX11: v_interp_p10_f16_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x24] +// GFX11: v_interp_p10_f16_f32 v0, -v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x24] v_interp_p10_f16_f32 v0, v1, -v2, v3 -// GFX11: v_interp_p10_f16_f32 v0, v1, -v2, v3 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x44] +// GFX11: v_interp_p10_f16_f32 v0, v1, -v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x44] v_interp_p10_f16_f32 v0, v1, v2, -v3 -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x84] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, -v3 wait_exp:0 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x84] v_interp_p10_f16_f32 v0, v1, v2, v3 clamp -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 clamp ; encoding: [0x00,0x80,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 clamp wait_exp:0 ; encoding: [0x00,0x80,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:0 -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:1 // GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:1 ; encoding: [0x00,0x01,0x02,0xcd,0x01,0x05,0x0e,0x04] @@ -97,22 +97,22 @@ v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:7 // GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:7 ; encoding: [0x00,0x07,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,0] -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x00,0x08,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0 ; encoding: [0x00,0x08,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] ; encoding: [0x00,0x10,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0 ; encoding: [0x00,0x10,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] ; encoding: [0x00,0x20,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0 ; encoding: [0x00,0x20,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x00,0x40,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0 ; encoding: [0x00,0x40,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] -// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x00,0x78,0x02,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0 ; encoding: [0x00,0x78,0x02,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 // GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 ; encoding: [0x00,0x4d,0x02,0xcd,0x01,0x05,0x0e,0x04] @@ -124,22 +124,22 @@ v_interp_p10_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5 // GFX11: v_interp_p10_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5 ; encoding: [0x00,0xcd,0x02,0xcd,0x01,0x05,0x0e,0xe4] v_interp_p2_f16_f32 v0, v1, v2, v3 -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, -v1, v2, v3 -// GFX11: v_interp_p2_f16_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x24] +// GFX11: v_interp_p2_f16_f32 v0, -v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x24] v_interp_p2_f16_f32 v0, v1, -v2, v3 -// GFX11: v_interp_p2_f16_f32 v0, v1, -v2, v3 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x44] +// GFX11: v_interp_p2_f16_f32 v0, v1, -v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x44] v_interp_p2_f16_f32 v0, v1, v2, -v3 -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x84] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, -v3 wait_exp:0 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x84] v_interp_p2_f16_f32 v0, v1, v2, v3 clamp -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 clamp ; encoding: [0x00,0x80,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 clamp wait_exp:0 ; encoding: [0x00,0x80,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:0 -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:1 // GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:1 ; encoding: [0x00,0x01,0x03,0xcd,0x01,0x05,0x0e,0x04] @@ -148,22 +148,22 @@ v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:7 // GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:7 ; encoding: [0x00,0x07,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,0] -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x00,0x08,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0 ; encoding: [0x00,0x08,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] ; encoding: [0x00,0x10,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0 ; encoding: [0x00,0x10,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] ; encoding: [0x00,0x20,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0 ; encoding: [0x00,0x20,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x00,0x40,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0 ; encoding: [0x00,0x40,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] -// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x00,0x78,0x03,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0 ; encoding: [0x00,0x78,0x03,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 // GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 ; encoding: [0x00,0x4d,0x03,0xcd,0x01,0x05,0x0e,0x04] @@ -175,22 +175,22 @@ v_interp_p2_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5 // GFX11: v_interp_p2_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5 ; encoding: [0x00,0xcd,0x03,0xcd,0x01,0x05,0x0e,0xe4] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, -v1, v2, v3 -// GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x24] +// GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x24] v_interp_p10_rtz_f16_f32 v0, v1, -v2, v3 -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, -v2, v3 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x44] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, -v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x44] v_interp_p10_rtz_f16_f32 v0, v1, v2, -v3 -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x84] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, -v3 wait_exp:0 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x84] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 clamp -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 clamp ; encoding: [0x00,0x80,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 clamp wait_exp:0 ; encoding: [0x00,0x80,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1 // GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1 ; encoding: [0x00,0x01,0x04,0xcd,0x01,0x05,0x0e,0x04] @@ -199,22 +199,22 @@ v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7 // GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7 ; encoding: [0x00,0x07,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,0] -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x00,0x08,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0 ; encoding: [0x00,0x08,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] ; encoding: [0x00,0x10,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0 ; encoding: [0x00,0x10,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] ; encoding: [0x00,0x20,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0 ; encoding: [0x00,0x20,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x00,0x40,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0 ; encoding: [0x00,0x40,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] -// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x00,0x78,0x04,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0 ; encoding: [0x00,0x78,0x04,0xcd,0x01,0x05,0x0e,0x04] v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 // GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 ; encoding: [0x00,0x4d,0x04,0xcd,0x01,0x05,0x0e,0x04] @@ -226,22 +226,22 @@ v_interp_p10_rtz_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5 // GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5 ; encoding: [0x00,0xcd,0x04,0xcd,0x01,0x05,0x0e,0xe4] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, -v1, v2, v3 -// GFX11: v_interp_p2_rtz_f16_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x24] +// GFX11: v_interp_p2_rtz_f16_f32 v0, -v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x24] v_interp_p2_rtz_f16_f32 v0, v1, -v2, v3 -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, -v2, v3 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x44] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, -v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x44] v_interp_p2_rtz_f16_f32 v0, v1, v2, -v3 -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x84] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, -v3 wait_exp:0 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x84] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 clamp -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 clamp ; encoding: [0x00,0x80,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 clamp wait_exp:0 ; encoding: [0x00,0x80,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1 // GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1 ; encoding: [0x00,0x01,0x05,0xcd,0x01,0x05,0x0e,0x04] @@ -250,22 +250,22 @@ v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7 // GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7 ; encoding: [0x00,0x07,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,0] -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x00,0x08,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0 ; encoding: [0x00,0x08,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] ; encoding: [0x00,0x10,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0 ; encoding: [0x00,0x10,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] ; encoding: [0x00,0x20,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0 ; encoding: [0x00,0x20,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x00,0x40,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0 ; encoding: [0x00,0x40,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] -// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x00,0x78,0x05,0xcd,0x01,0x05,0x0e,0x04] +// GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0 ; encoding: [0x00,0x78,0x05,0xcd,0x01,0x05,0x0e,0x04] v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 // GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5 ; encoding: [0x00,0x4d,0x05,0xcd,0x01,0x05,0x0e,0x04] diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt index 018af4646c1f9..d9803fdfd7ac2 100644 --- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt +++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt @@ -19,10 +19,10 @@ # GFX11: lds_direct_load v15 wait_vdst:1 ; encoding: [0x0f,0x00,0x11,0xce] 0x0f,0x00,0x11,0xce -# GFX11: lds_direct_load v16 ; encoding: [0x10,0x00,0x10,0xce] +# GFX11: lds_direct_load v16 wait_vdst:0 ; encoding: [0x10,0x00,0x10,0xce] 0x10,0x00,0x10,0xce -# GFX11: lds_direct_load v17 ; encoding: [0x11,0x00,0x10,0xce] +# GFX11: lds_direct_load v17 wait_vdst:0 ; encoding: [0x11,0x00,0x10,0xce] 0x11,0x00,0x10,0xce # GFX11: lds_direct_load v1 wait_vdst:15 ; encoding: [0x01,0x00,0x1f,0xce] @@ -70,10 +70,10 @@ # GFX11: lds_param_load v15, attr63.z wait_vdst:1 ; encoding: [0x0f,0xfe,0x01,0xce] 0x0f,0xfe,0x01,0xce -# GFX11: lds_param_load v16, attr63.w ; encoding: [0x10,0xff,0x00,0xce] +# GFX11: lds_param_load v16, attr63.w wait_vdst:0 ; encoding: [0x10,0xff,0x00,0xce] 0x10,0xff,0x00,0xce -# GFX11: lds_param_load v17, attr63.w ; encoding: [0x11,0xff,0x00,0xce] +# GFX11: lds_param_load v17, attr63.w wait_vdst:0 ; encoding: [0x11,0xff,0x00,0xce] 0x11,0xff,0x00,0xce # GFX11: lds_param_load v1, attr0.x wait_vdst:15 ; encoding: [0x01,0x00,0x0f,0xce] diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt index da1f129fcf40e..b22fd5e289fae 100644 --- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt +++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt @@ -1,31 +1,31 @@ # RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble %s | FileCheck -strict-whitespace -check-prefix=GFX11 %s -# GFX11: v_interp_p10_f32 v0, v1, v2, v3{{$}} +# GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04 # Check that unused bits in the encoding are ignored. -# GFX11: v_interp_p10_f32 v0, v1, v2, v3{{$}} +# GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x80,0xcd,0x01,0x05,0x0e,0x1c -# GFX11: v_interp_p10_f32 v1, v10, v20, v30{{$}} +# GFX11: v_interp_p10_f32 v1, v10, v20, v30 wait_exp:0{{$}} 0x01,0x00,0x00,0xcd,0x0a,0x29,0x7a,0x04 -# GFX11: v_interp_p10_f32 v2, v11, v21, v31{{$}} +# GFX11: v_interp_p10_f32 v2, v11, v21, v31 wait_exp:0{{$}} 0x02,0x00,0x00,0xcd,0x0b,0x2b,0x7e,0x04 -# GFX11: v_interp_p10_f32 v3, v12, v22, v32{{$}} +# GFX11: v_interp_p10_f32 v3, v12, v22, v32 wait_exp:0{{$}} 0x03,0x00,0x00,0xcd,0x0c,0x2d,0x82,0x04 -# GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp{{$}} +# GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}} 0x00,0x80,0x00,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f32 v0, -v1, v2, v3{{$}} +# GFX11: v_interp_p10_f32 v0, -v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x24 -# GFX11: v_interp_p10_f32 v0, v1, -v2, v3{{$}} +# GFX11: v_interp_p10_f32 v0, v1, -v2, v3 wait_exp:0{{$}} 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x44 -# GFX11: v_interp_p10_f32 v0, v1, v2, -v3{{$}} +# GFX11: v_interp_p10_f32 v0, v1, v2, -v3 wait_exp:0{{$}} 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x84 # GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:1{{$}} @@ -37,28 +37,28 @@ # GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp wait_exp:7{{$}} 0x00,0x87,0x00,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f32 v0, v1, v2, v3{{$}} +# GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f32 v1, v10, v20, v30{{$}} +# GFX11: v_interp_p2_f32 v1, v10, v20, v30 wait_exp:0{{$}} 0x01,0x00,0x01,0xcd,0x0a,0x29,0x7a,0x04 -# GFX11: v_interp_p2_f32 v2, v11, v21, v31{{$}} +# GFX11: v_interp_p2_f32 v2, v11, v21, v31 wait_exp:0{{$}} 0x02,0x00,0x01,0xcd,0x0b,0x2b,0x7e,0x04 -# GFX11: v_interp_p2_f32 v3, v12, v22, v32{{$}} +# GFX11: v_interp_p2_f32 v3, v12, v22, v32 wait_exp:0{{$}} 0x03,0x00,0x01,0xcd,0x0c,0x2d,0x82,0x04 -# GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp{{$}} +# GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}} 0x00,0x80,0x01,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f32 v0, -v1, v2, v3{{$}} +# GFX11: v_interp_p2_f32 v0, -v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x24 -# GFX11: v_interp_p2_f32 v0, v1, -v2, v3{{$}} +# GFX11: v_interp_p2_f32 v0, v1, -v2, v3 wait_exp:0{{$}} 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x44 -# GFX11: v_interp_p2_f32 v0, v1, v2, -v3{{$}} +# GFX11: v_interp_p2_f32 v0, v1, v2, -v3 wait_exp:0{{$}} 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x84 # GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:1{{$}} @@ -70,19 +70,19 @@ # GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp wait_exp:7{{$}} 0x00,0x87,0x01,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f16_f32 v0, -v1, v2, v3{{$}} +# GFX11: v_interp_p10_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x24 -# GFX11: v_interp_p10_f16_f32 v0, v1, -v2, v3{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}} 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x44 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, -v3{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}} 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x84 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 clamp{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}} 0x00,0x80,0x02,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}} @@ -91,19 +91,19 @@ # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}} 0x00,0x07,0x02,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0]{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}} 0x00,0x08,0x02,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0]{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}} 0x00,0x10,0x02,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0]{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}} 0x00,0x20,0x02,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}} 0x00,0x40,0x02,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1]{{$}} +# GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}} 0x00,0x78,0x02,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}} @@ -115,19 +115,19 @@ # GFX11: v_interp_p10_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}} 0x00,0xcd,0x02,0xcd,0x01,0x05,0x0e,0xe4 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f16_f32 v0, -v1, v2, v3{{$}} +# GFX11: v_interp_p2_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x24 -# GFX11: v_interp_p2_f16_f32 v0, v1, -v2, v3{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}} 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x44 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, -v3{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}} 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x84 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 clamp{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}} 0x00,0x80,0x03,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}} @@ -136,19 +136,19 @@ # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}} 0x00,0x07,0x03,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0]{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}} 0x00,0x08,0x03,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0]{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}} 0x00,0x10,0x03,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0]{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}} 0x00,0x20,0x03,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}} 0x00,0x40,0x03,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1]{{$}} +# GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}} 0x00,0x78,0x03,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}} @@ -160,19 +160,19 @@ # GFX11: v_interp_p2_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}} 0x00,0xcd,0x03,0xcd,0x01,0x05,0x0e,0xe4 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, v2, v3{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x24 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, -v2, v3{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}} 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x44 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, -v3{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}} 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x84 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 clamp{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}} 0x00,0x80,0x04,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}} @@ -181,19 +181,19 @@ # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}} 0x00,0x07,0x04,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0]{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}} 0x00,0x08,0x04,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0]{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}} 0x00,0x10,0x04,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0]{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}} 0x00,0x20,0x04,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}} 0x00,0x40,0x04,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1]{{$}} +# GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}} 0x00,0x78,0x04,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}} @@ -205,19 +205,19 @@ # GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}} 0x00,0xcd,0x04,0xcd,0x01,0x05,0x0e,0xe4 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_rtz_f16_f32 v0, -v1, v2, v3{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}} 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x24 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, -v2, v3{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}} 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x44 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, -v3{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}} 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x84 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 clamp{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}} 0x00,0x80,0x05,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}} @@ -226,19 +226,19 @@ # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}} 0x00,0x07,0x05,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0]{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}} 0x00,0x08,0x05,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0]{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}} 0x00,0x10,0x05,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0]{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}} 0x00,0x20,0x05,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1]{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}} 0x00,0x40,0x05,0xcd,0x01,0x05,0x0e,0x04 -# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1]{{$}} +# GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}} 0x00,0x78,0x05,0xcd,0x01,0x05,0x0e,0x04 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}}