[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default #126880
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@llvm/pr-subscribers-lld-wasm @llvm/pr-subscribers-backend-arm Author: Nikita Popov (nikic) ChangesThe standard libcalls for half to float and float to half conversion are __extendhfsf2 and __truncsfhf2. However, LLVM currently uses __gnu_h2f_ieee and __gnu_f2h_ieee instead. As far as I can tell, these libcalls are ARM-ism and only provided by libgcc on that platform. compiler-rt always provides both libcalls. Use the standard libcalls by default, and only use the __gnu libcalls on ARM to improve libgcc compatibility. We encountered this issue with MLIR execution engine test failures on Power 8. Patch is 223.28 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/126880.diff 35 Files Affected:
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.def b/llvm/include/llvm/IR/RuntimeLibcalls.def
index a7963543c4350..c6ac341d71a20 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.def
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.def
@@ -384,8 +384,8 @@ HANDLE_LIBCALL(FPEXT_F16_F128, "__extendhftf2")
HANDLE_LIBCALL(FPEXT_F16_F80, "__extendhfxf2")
HANDLE_LIBCALL(FPEXT_F32_F64, "__extendsfdf2")
HANDLE_LIBCALL(FPEXT_F16_F64, "__extendhfdf2")
-HANDLE_LIBCALL(FPEXT_F16_F32, "__gnu_h2f_ieee")
-HANDLE_LIBCALL(FPROUND_F32_F16, "__gnu_f2h_ieee")
+HANDLE_LIBCALL(FPEXT_F16_F32, "__extendhfsf2")
+HANDLE_LIBCALL(FPROUND_F32_F16, "__truncsfhf2")
HANDLE_LIBCALL(FPROUND_F64_F16, "__truncdfhf2")
HANDLE_LIBCALL(FPROUND_F80_F16, "__truncxfhf2")
HANDLE_LIBCALL(FPROUND_F128_F16, "__trunctfhf2")
diff --git a/llvm/lib/IR/RuntimeLibcalls.cpp b/llvm/lib/IR/RuntimeLibcalls.cpp
index e38fce764b640..1f94400f7c088 100644
--- a/llvm/lib/IR/RuntimeLibcalls.cpp
+++ b/llvm/lib/IR/RuntimeLibcalls.cpp
@@ -170,9 +170,6 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
// TODO: BridgeOS should be included in isOSDarwin.
setLibcallName(RTLIB::EXP10_F32, "__exp10f");
setLibcallName(RTLIB::EXP10_F64, "__exp10");
- } else {
- setLibcallName(RTLIB::FPEXT_F16_F32, "__gnu_h2f_ieee");
- setLibcallName(RTLIB::FPROUND_F32_F16, "__gnu_f2h_ieee");
}
if (TT.isGNUEnvironment() || TT.isOSFuchsia() ||
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 5c4fe9d922f4c..3a975e5db0e5e 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -767,6 +767,9 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
setLibcallName(LC.Op, LC.Name);
setLibcallCallingConv(LC.Op, LC.CC);
}
+ } else if (!Subtarget->isTargetMachO()) {
+ setLibcallName(RTLIB::FPROUND_F32_F16, "__gnu_f2h_ieee");
+ setLibcallName(RTLIB::FPEXT_F16_F32, "__gnu_h2f_ieee");
}
if (Subtarget->isThumb1Only())
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index 1a7667fe42fbc..be1960db41479 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -1886,11 +1886,6 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
setLibcallName(RTLIB::SQRT_F32, "__hexagon_fast2_sqrtf");
else
setLibcallName(RTLIB::SQRT_F32, "__hexagon_sqrtf");
-
- // Routines to handle fp16 storage type.
- setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
- setLibcallName(RTLIB::FPROUND_F64_F16, "__truncdfhf2");
- setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
}
const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 7ca8482149eb9..1e06215fa79e6 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1549,9 +1549,6 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
if (Subtarget.useRVVForFixedLengthVectors())
setTargetDAGCombine(ISD::BITCAST);
- setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
- setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
-
// Disable strict node mutation.
IsStrictFPEnabled = true;
EnableExtLdPromotion = true;
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index fedad25c775e2..3c918e8b675f0 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -377,11 +377,6 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
setMaxAtomicSizeInBitsSupported(64);
- // Override the __gnu_f2h_ieee/__gnu_h2f_ieee names so that the f32 name is
- // consistent with the f64 and f128 names.
- setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
- setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
-
// Define the emscripten name for return address helper.
// TODO: when implementing other Wasm backends, make this generic or only do
// this on emscripten depending on what they end up doing.
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
index b20a06b238c88..1fe0b1f2e0591 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
@@ -537,10 +537,6 @@ struct StaticLibcallNameMap {
Map[NameLibcall.first] = NameLibcall.second;
}
}
- // Override the __gnu_f2h_ieee/__gnu_h2f_ieee names so that the f32 name is
- // consistent with the f64 and f128 names.
- Map["__extendhfsf2"] = RTLIB::FPEXT_F16_F32;
- Map["__truncsfhf2"] = RTLIB::FPROUND_F32_F16;
Map["emscripten_return_address"] = RTLIB::RETURN_ADDRESS;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 91249f0bb009f..839c28ef643ef 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -736,9 +736,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::STRICT_FP_EXTEND, MVT::f32, Custom);
setOperationAction(ISD::STRICT_FP_EXTEND, MVT::f64, Custom);
- setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
- setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
-
// Lower this to MOVMSK plus an AND.
setOperationAction(ISD::FGETSIGN, MVT::i64, Custom);
setOperationAction(ISD::FGETSIGN, MVT::i32, Custom);
diff --git a/llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll b/llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
index bfe9ab8424bb0..0bd7c1b10b123 100644
--- a/llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
+++ b/llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
@@ -7,7 +7,7 @@ define half @f2h(float %a) {
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -16
-; CHECK-NEXT: bl __gnu_f2h_ieee
+; CHECK-NEXT: bl __truncsfhf2
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll b/llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
index 0c3a40d93d640..21729b9dfd101 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
@@ -60,13 +60,13 @@ define half @test_atomicrmw_fadd_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl __addsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -148,13 +148,13 @@ define half @test_atomicrmw_fadd_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl __addsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -712,22 +712,22 @@ define <2 x half> @test_atomicrmw_fadd_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
; SOFTFP-NOLSE-NEXT: // Child Loop BB7_3 Depth 2
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w24
; SOFTFP-NOLSE-NEXT: bl __addsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w25, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w25
; SOFTFP-NOLSE-NEXT: bl __addsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w22
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll b/llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
index 24088998f36d1..9b5e48d2b4217 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
@@ -62,13 +62,13 @@ define half @test_atomicrmw_fmax_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fmaxf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -150,13 +150,13 @@ define half @test_atomicrmw_fmax_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fmaxf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -592,22 +592,22 @@ define <2 x half> @test_atomicrmw_fmax_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
; SOFTFP-NOLSE-NEXT: // Child Loop BB6_3 Depth 2
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w24
; SOFTFP-NOLSE-NEXT: bl fmaxf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w25, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w25
; SOFTFP-NOLSE-NEXT: bl fmaxf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w22
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll b/llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
index 65f1f4863c173..f6c542fe7d407 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
@@ -62,13 +62,13 @@ define half @test_atomicrmw_fmin_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fminf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -150,13 +150,13 @@ define half @test_atomicrmw_fmin_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fminf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -592,22 +592,22 @@ define <2 x half> @test_atomicrmw_fmin_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
; SOFTFP-NOLSE-NEXT: // Child Loop BB6_3 Depth 2
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w24
; SOFTFP-NOLSE-NEXT: bl fminf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w25, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w25
; SOFTFP-NOLSE-NEXT: bl fminf
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w22
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll b/llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
index 0f1a2f03c98c3..82e0f14e68e26 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
@@ -60,13 +60,13 @@ define half @test_atomicrmw_fsub_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl __subsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -148,13 +148,13 @@ define half @test_atomicrmw_fsub_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl __subsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -712,22 +712,22 @@ define <2 x half> @test_atomicrmw_fsub_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
; SOFTFP-NOLSE-NEXT: // Child Loop BB7_3 Depth 2
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w24
; SOFTFP-NOLSE-NEXT: bl __subsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w25, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
-; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
+; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w25
; SOFTFP-NOLSE-NEXT: bl __subsf3
-; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
+; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w22
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16
diff --git a/llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll b/llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll
index 3db802a2bc355..63b8a1cee27ae 100644
--- a/llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll
+++ b/llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll
@@ -22,7 +22,7 @@ define void @f16_arg(half %arg, ptr %ptr) #0 {
; NOFP16-NEXT: .cfi_offset w30, -16
; NOFP16-NEXT: and w0, w0, #0xffff
; NOFP16-NEXT: mov x19, x1
-; NOFP16-NEXT: bl __gnu_h2f_ieee
+; NOFP16-NEXT: bl __extendhfsf2
; NOFP16-NEXT: str w0, [x19]
; NOFP16-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; NOFP16-NEXT: ret
@@ -44,10 +44,10 @@ define void @v2f16_arg(<2 x half> %arg, ptr %ptr) #0 {
; NOFP16-NEXT: and w0, w0, #0xffff
; NOFP16-NEXT: mov x19, x2
; NOFP16-NEXT: mov w20, w1
-; NOFP16-NEXT: bl __gnu_h2f_ieee
+; NOFP16-NEXT: bl __extendhfsf2
; NOFP16-NEXT: mov w21, w0
; NOFP16-NEXT: and w0, w20, #0xffff
-; NOFP16-NEXT: bl __gnu_h2f_ieee
+; NOFP16-NEXT: bl __extendhfsf2
; NOFP16-NEXT: stp w21, w0, [x19]
; NOFP16-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; NOFP16-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
@@ -73,14 +73,14 @@ define void @v3f16_arg(<3 x half> %arg, ptr %ptr) #0 {
; NOFP16-NEXT: and w0, w1, #0xffff
; NOFP16-NEXT: mov x19, x3
; NOFP16-NEXT: mov w20, w2
-; NOFP16-NEXT: bl __gnu_h2f_ieee
+; NOFP16-NEXT: bl __extendhfsf2
; NOFP16-NEXT: mov w22, w0
; NOFP16-NEXT: and w0, w21, #0xffff
-; NOFP16-NEXT: bl __gnu_h2f_i...
[truncated]
|
|
Okay, looking a bit more deeply, libgcc only seems to actually enable __extendhfsf2 and __truncsfhf2 for i386 and riscv, if I'm reading the sources correctly. So while I still think it makes sense to use these symbols instead of the ARM ones, it probably makes little practical difference... |
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The standard libcalls for half to float and float to half conversion are __extendhfsf2 and __truncsfhf2. However, LLVM currently uses __gnu_h2f_ieee and __gnu_f2h_ieee instead. As far as I can tell, these libcalls are ARM-ism and only provided by libgcc on that platform. compiler-rt always provides both libcalls. Use the standard libcalls by default, and only use the __gnu libcalls on ARM to improve libgcc compatibilty. We encounted this issue with MLIR execution engine test failures on Power 8.
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The issue this testing is now fixed for the half float intrinsics. Use a different one that still has the issue.
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|
Adjusted the lld test to use a different builtin, because the issue it is testing is fixed for half float builtins now. |
efriedma-quic
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Feb 18, 2025
|
This change broke CSKY CodeGen tests: |
|
CSKY is experimental; please don't ask non-CSKY developers to fix regression test failures. |
|
I figured it wouldn't have hurt to have asked, given that this change altered a fair number of targets already. |
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Update it for the libcall change in #126880.
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* 58df0ef89dd6 Define LLVM_ABI and CLANG_ABI for __EMSCRIPTEN__ builds (#131578) * e256eda15377 [LoongArch][MC] Add relocation support for fld fst [x]vld [x]vst * ba00d9f641e9 [LoongArch] Pre-commit test for #133225 * f07f96873aa8 Backport/20.x: [LoongArch] Fix the type of tls-le symbols * e7406753caf3 [PATCH] [clang][modules] Fix serialization and de-serialization of PCH module file refs (#105994) (#132802) * 2f6c5807ca7e [workflows] Add missing -y option to apt-get for abi tests (#133337) * bc65196c0919 update test due to llvm/llvm-project#126880 not being backported * d6d1dbf22181 [ARM] Speedups for CombineBaseUpdate. (#129725) * 5ba194972878 [MC,COFF] .safeseh: avoid changeSection (#132624) * 943b43250b55 release/20.x: [clang][docs] Move -Wnontrivial-memcall to added flags. (#132367) * 44a6f6abbdb6 [libcxx] [test] Fix restoring LLVM_DIR and Clang_DIR (#132838) * c1c4d7191d70 [clang-format] Allow `Language: Cpp` for C files (#133033) * 2406e0d4467a Revert "[MC] Explicitly mark MCSymbol for MO_ExternalSymbol" (#133291) * 3d5f5ef6b784 workflows: Add missing apt-get update to abi tests (#133264) * d1f5a9f66ee2 [hexagon] Bump the default version to v68 (#132304) * 90cc9ca8bcb2 [Hexagon] Set the default compilation target to V68 (#125239) * 3e2801eb634e [PowerPC] Support conversion between f16 and f128 (#130158) * d60baf3d4786 [HEXAGON] Fix semantics of ordered FP compares (#131089) * 1a76c29a9ba8 [hexagon] Enable --eh-frame-hdr (#130225) * ecde8c235e5e [clang] fix matching of nested template template parameters * c86df914dee1 release/20.x: [Clang] Fix various bugs in alias CTAD transform * f7b6f23c6bb7 [llvm-dlltool] Add a missing dependency * a311bc81d957 [llvm-dlltool] Implement the --identify option (#127465) * 6034661369c4 [LoongArch] Pre-commit test for fixing tls-le symbol type * 95763651e25c [HEXAGON] Add support to lower "FREEZE a half(f16)" instruction on Hexagon and fix the isel-buildvector-v2f16.ll assertion (#130977) * e0e8071815c7 [hexagon] Prevent alignment search beyond a label (#130631) * 2198410a8a8a [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) * 0383020b6c1a [llvm] Fix crash when complex deinterleaving operates on an unrolled loop (#129735) * dc7b743515d3 [AArch64] Fix SVE scalar fcopysign lowering without neon. (#129787) * fcd0ad23f668 [AArch64] Add test for scalar copysign. NFC * 66825a89b8e0 [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289) * 9710e9963455 [X86][AVX10.2] Include changes for COMX and VGETEXP from rev. 2 (#132824) * 3f957cc67cff Bump version to 20.1.2 (#132293) Signed-off-by: Khem Raj <[email protected]>
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* 58df0ef89dd6 Define LLVM_ABI and CLANG_ABI for __EMSCRIPTEN__ builds (#131578) * e256eda15377 [LoongArch][MC] Add relocation support for fld fst [x]vld [x]vst * ba00d9f641e9 [LoongArch] Pre-commit test for #133225 * f07f96873aa8 Backport/20.x: [LoongArch] Fix the type of tls-le symbols * e7406753caf3 [PATCH] [clang][modules] Fix serialization and de-serialization of PCH module file refs (#105994) (#132802) * 2f6c5807ca7e [workflows] Add missing -y option to apt-get for abi tests (#133337) * bc65196c0919 update test due to llvm/llvm-project#126880 not being backported * d6d1dbf22181 [ARM] Speedups for CombineBaseUpdate. (#129725) * 5ba194972878 [MC,COFF] .safeseh: avoid changeSection (#132624) * 943b43250b55 release/20.x: [clang][docs] Move -Wnontrivial-memcall to added flags. (#132367) * 44a6f6abbdb6 [libcxx] [test] Fix restoring LLVM_DIR and Clang_DIR (#132838) * c1c4d7191d70 [clang-format] Allow `Language: Cpp` for C files (#133033) * 2406e0d4467a Revert "[MC] Explicitly mark MCSymbol for MO_ExternalSymbol" (#133291) * 3d5f5ef6b784 workflows: Add missing apt-get update to abi tests (#133264) * d1f5a9f66ee2 [hexagon] Bump the default version to v68 (#132304) * 90cc9ca8bcb2 [Hexagon] Set the default compilation target to V68 (#125239) * 3e2801eb634e [PowerPC] Support conversion between f16 and f128 (#130158) * d60baf3d4786 [HEXAGON] Fix semantics of ordered FP compares (#131089) * 1a76c29a9ba8 [hexagon] Enable --eh-frame-hdr (#130225) * ecde8c235e5e [clang] fix matching of nested template template parameters * c86df914dee1 release/20.x: [Clang] Fix various bugs in alias CTAD transform * f7b6f23c6bb7 [llvm-dlltool] Add a missing dependency * a311bc81d957 [llvm-dlltool] Implement the --identify option (#127465) * 6034661369c4 [LoongArch] Pre-commit test for fixing tls-le symbol type * 95763651e25c [HEXAGON] Add support to lower "FREEZE a half(f16)" instruction on Hexagon and fix the isel-buildvector-v2f16.ll assertion (#130977) * e0e8071815c7 [hexagon] Prevent alignment search beyond a label (#130631) * 2198410a8a8a [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) * 0383020b6c1a [llvm] Fix crash when complex deinterleaving operates on an unrolled loop (#129735) * dc7b743515d3 [AArch64] Fix SVE scalar fcopysign lowering without neon. (#129787) * fcd0ad23f668 [AArch64] Add test for scalar copysign. NFC * 66825a89b8e0 [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289) * 9710e9963455 [X86][AVX10.2] Include changes for COMX and VGETEXP from rev. 2 (#132824) * 3f957cc67cff Bump version to 20.1.2 (#132293) Signed-off-by: Khem Raj <[email protected]>
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Brings following bugfixes on top of 20.1.0
87f0227cb601 (HEAD, tag: llvmorg-20.1.8, origin/release/20.x) [InstCombine] Avoid folding `select(umin(X, Y), X)` with min/max values in false arm (#143020)
df43f93388b7 [PhaseOrdering] Add test for #139050 (NFC)
25bcf1145fd7 [RISCV] Fix assertion failure when using -fstack-clash-protection (#135248)
6fb913d3e2ec [RelLookupTableConverter] Drop unnamed_addr for GVs in entries to avoid generating GOTPCREL relocations (#146068)
0c9f909b7976 [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (#143371)
fa792cd4c630 [AsmPrinter] Always emit global equivalents if there is non-global uses (#145648)
ce455b382c08 [objcopy][MachO] Revert special handling of encryptable binaries (#144058)
0de59a293f7a [X86] Ignore NSW when DstSVT is i32 (#131755)
9af763f038f7 [gtest] Fix building on OpenBSD/sparc64 (#145225)
1daceb20611f [LoongArch] Pass OptLevel to LoongArchDAGToDAGISel correctly
b21155f97a0a [LoongArch] Precommit test case to show bug in LoongArchISelDagToDag
da18fb9f04ce [LoongArch] Fix xvshuf instructions lowering (#145868)
65ce78f338cf [LoongArch] Pre-commit test for fixing xvshuf instructions. NFC
5532d5b745e4 [AArch64] Ensure the LR is preserved if we must call __arm_get_current_vg (#145760)
5ac3ce819688 [WebAssembly] Fix inline assembly with vector types (#146574)
b83658b7e2c8 Bump version to 20.1.8
6146a88f6049 (tag: llvmorg-20.1.7) [LoongArch] Fix '-mno-lsx' option not disabling LASX feature (#143821)
9ba132be8eea [clan-reply] Backport PTU error recovery to 20.x
199e02a36433 Disable clangd/test/module_dependencies.test on Windows
02aec86e4d0d [clangd] [Modules] Fix to correctly handle module dependencies (#142828)
c4f257cb74b5 [llvm-rc] Allow ALT on non-virtkey accelerators (#143374)
6fa0cdf3720b release/20.x: [clang] Don't evaluate the initializer of constexpr-unknown parameters. (#142498)
337beb73abfe [libc++] Add _LIBCPP_NO_UNIQUE_ADDRESS to flat_{,multi}map::value_compare (#137594)
b8e10ca59b6a [libc++] Fix check for _LIBCPP_HAS_NO_WIDE_CHARACTERS in features.py (#131675)
2da24c36c7df [libcxx] Provide locale conversions to tests through lit substitution (#105651)
253e9321c8b6 [release/20.x] Update release notes for SystemZ changes (#140060)
acf86c5c4dbe [CVP] Keep `ReachableCaseCount` in sync with range of condition (#142302)
2481e590eec7 [AArch64][SME] Fix accessing the emergency spill slot with hazard padding (#142190)
22a3e6b19409 release/20.x: [AArch64] Handle XAR with v1i64 operand types (#141754)
e5dd4f129454 [clangd] Guard against trivial FunctionProtoTypeLoc when creating inlay hints (#143087)
f6532710ace8 [clang-format] Correctly annotate token-pasted function decl names (#142337)
e0586e278f96 [RelLookupTableConverter] Drop unnamed_addr to avoid generating GOTPCREL relocations (#142304)
7759bb57c243 [clang] Serialization: support hashing null template arguments
7cf14539b644 Bump version to 20.1.7
47addd4540b4 (tag: llvmorg-20.1.6) [libclc] Include isnan implementation for SPIR-V targets
4b6e5a286653 [clang-format] Handle Java text blocks (#141334)
0e1ef696f1fe [Driver] Fix _XOPEN_SOURCE definition on Solaris (#137141)
5d99a97583e1 [MachO] Improve bounds check (#141083)
aa804fd3e624 [sanitizer_common] Remove interceptors for deprecated struct termio (#137403)
53393e26d5f4 [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (#140862)
6fcb1c127b40 [LoongArch] Fix assertion failure for annotate tablejump (#140907)
15ec590e389b release/20.x: [clang-format] Fix the indent of StartOfName after AttributeMacro (#140361)
802f4f75372e [clang-format] Handle raw string literals containing JSON code (#140666)
9b0832508ede [SDAG] Ensure load is included in output chain of sincos expansion (#140525)
8a36b8e3ab46 [clang][analyzer] Handle CXXParenInitListExpr alongside InitListExpr
070cf62530ea [Clang] Demote mixed enumeration arithmetic error to a warning (#131811)
a169f5ca4e4f Correct position of CFI Instruction for Pointer Authentication"
5befd1fb3c97 [Clang][AST] Fix HandleLValueBase to deal with references (#140105)
e3d2c00ccee4 [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631)
85e06a761483 [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (#137129)
ff2e8f93f609 Fix test pfalse-v4i1.ll added in #138712 to require asserts.
1e4d39e07757 Bump version to 20.1.6
7b09d7b44638 (tag: llvmorg-20.1.5) [analyzer] Workaround for slowdown spikes (unintended scope increase) (#136720)
a708fb737a78 [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (#136842)
1c0368417f55 [clang][analysis] Fix flaky clang/test/Analysis/live-stmts.cpp test (2nd attempt) (#127406)
0439d1d36312 [Clang] Fix handling of reference types in tryEvaluateBuiltinObjectSize (#138247)
74ed1ac61104 [sanitizer_common] Fix build on ppc64+musl (#120036)
2d079b96a5fb release/20.x: [clang-format] Fix a crash on formatting missing r_paren/r_brace (#138230)
2cacf46f35c8 [X86][TargetLowering] Avoid deleting temporary nodes in `getNegatedExpression` (#139029)
f233430d977b [AArch64] Fix feature list for FUJITSU-MONAKA processor (#139212)
41c36d940804 [clang] Fix unused variable warning in MS mangler from constant matrix patch
72ad9be1e337 [Clang][MicrosoftMangle] Implement mangling for ConstantMatrixType (#134930)
0019b7d0ae0b [wasm-ld] Refactor WasmSym from static globals to per-link context (#134970)
b7b834e2a20e [RTSan][Darwin] Adjust OSSpinLock/_os_nospin_lock interceptor and tests (#132867)
f811c7df0a10 [rtsan][Apple] Add interceptor for _os_nospin_lock_lock (#131034)
4370072022e5 [clang] Forward TPL of NestedNameSpecifier
d34d5296095b Support z17 processor name and scheduler description
a7166c373946 release/20.x: [clang-format] RemoveParentheses shouldn't remove empty parentheses (#138229)
5429418cb064 [clang] Add support for Debian 14 Forky and Debian 15 Duke (#138460)
be087ab35970 [libc++] Re-introduce _LIBCPP_DISABLE_AVAILABILITY (#134158)
2b34040173f7 [clang-repl] Fix destructor for interpreter for the cuda negation case (#138091)
ae97a56d363f [Hexagon] Add missing patterns to select PFALSE and PTRUE (#138712)
2386c377db4f [BasicAA] Gracefully handle large LocationSize (#138528)
961ce35e2957 [OpenMP] Add pre sm_70 load hack back in (#138589)
009f3c10d1c1 [LLD][COFF] Don't dllimport from static libraries (#134443)
70eed33971d9 [InstCombine] Do not combine shuffle+bitcast if the bitcast is eliminable. (#135769)
6ddf2e5d10f8 [clang-tidy] Do not pass any file when listing checks in run_clang_ti… (#137286)
8272e451613d [flang] Exempt construct entities from SAVE check for PURE (#131383)
069ef671e0ab [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (#136726)
a38e1ae2041d [AArch64][SME2] Don't preserve ZT0 around SME ABI routines (#132722)
be4097b6ee57 Fix crash lowering stack guard on OpenBSD/aarch64. (#125416)
aecbb2364a7c [Clang] Fix the trailing comma regression (#136273)
ebfae55af454 Bump version to 20.1.5
ec28b8f9cc7f (tag: llvmorg-20.1.4) [libcxx] [test] Extend mingw workarounds for armv7/aarch64 too (#136419)
8c2dc1b5aa7f [clang-repl] Implement LoadDynamicLibrary for clang-repl wasm use cases (#133037)
02afcbf63fee [SystemZ] Fix compile time regression in adjustInliningThreshold(). (#137527)
c877757659e8 [clang-repl] : Fix clang-repl crash with --cuda flag (#136404)
f4779c389868 [InstCombine] Preserve signbit semantics of NaN with fold to fabs (#136648)
57a31e183dc8 [InstCombine] Do not fold logical is_finite test (#136851)
1cf8c7797d2b [GlobalOpt] Do not promote malloc if there are atomic loads/stores (#137158)
24805c2e0817 [lldb] Use correct path for lldb-server executable (#131519)
182e8b7f8a71 [clang-format] Correctly annotate kw_operator in using decls (#136545)
425d1aad294f [RISCV] Handle scalarized reductions in getArithmeticReductionCost
2d7ad98ec0a8 [clang][analyzer] Fix error path of builtin overflow (#136345)
e7ae5532bc27 [clang-format] Fix mismatched break in BlockIndent (#124998)
8f288eb619db [lldb][test] Adjust TestTargetReadInstructionsFlavor skipIfs
d76ec6a75d39 [lldb] Fix SBTarget::ReadInstruction with flavor (#134626)
62072e7f877e [clang][AST] Handle implicit first argument in CallExpr::getBeginLoc()
581772ed077e [LoongArch] Don't crash on instruction prefetch intrinsics (#135760)
89adc2d4f93b [HEXAGON] Fix corner cases for hwloops pass (#135439)
78f6719ca9b5 [GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801)
ab0074fe306f Bump version to 20.1.4
923a5c4f83d2 (tag: llvmorg-20.1.3) Revert "[ARM][ConstantIslands] Correct MinNoSplitDisp calculation (#114590)"
86f5891c5986 [llvm][Hexagon] Promote operand v2i1 to v2i32 (#135409)
d55c3c20520a [libc++] Fix misplaced _LIBCPP_POP_MACROS (#134874)
9420327ad768 [Clang] Fix a lambda pattern comparison mismatch after ecc7e6ce4 (#133863)
4da7285e636e Silence -Wcast-function-type warnings on idiomatic Windows code (#135660)
c5109be53b7e [LV] Disable epilogue vectorization for FindLastIV if start is poison.
91a3f14d9497 [LV] Add tests with FindLastIV and epilogue vectorization.
2131242240f7 [LLVM][MemCpyOpt] Unify alias tags if we optimize allocas (#129537)
86c98536380b [libc++] Fix deployment targets that were incorrectly bumped (#134278)
dfd6f123362a [libc++] Guard additional headers with _LIBCPP_HAS_LOCALIZATION (#131921)
dc9d4f9a7008 [lldb] Respect LaunchInfo::SetExecutable in ProcessLauncherPosixFork (#133093)
9c7d72869876 [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (#133839)
0c30835a63db [X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489)
2e0966408283 [X86] Backport saturate-convert intrinsics renaming & YMM rounding intrinsics removal in AVX10.2
0dd4235473d4 [SCEV] Use ashr to adjust constant multipliers (#135534)
a141e58685fd [llvm][CodeGen] avoid repeated interval calculation in window scheduler (#132352)
d88cd35023b4 [llvm][CodeGen] Fix the empty interval issue in Window Scheduler (#129204)
73d1e8598eda [CodeGen] Avoid repeated hash lookups (NFC) (#130237)
7034995f1029 [clang] Handle Binary StingLiteral kind in one more place (#132201)
2e7710eaffdd [clang] Introduce "binary" StringLiteral for #embed data (#127629)
e0db588f3db4 [IR] Fix assertion error in User new/delete edge case (#129914)
d5bb7b866e59 Avoid a race condition in opt-viewer/optrecord (#131214)
d15fef4209f1 [IndVarSimplify] Handle the case where both operands are the same when widening IV (#135207)
91647ae0dffe [X86][SSE] Don't emit SSE2 load instructions in SSE1-only mode (#134547)
d05543ed0796 [clang-format] Keep the space between `not` and a unary operator (#135035)
81220e68a496 [fatlto] Add coroutine passes when using FatLTO with ThinLTO (#134434)
edb54a7821fe Release/20.x: [clang-format] Set C11 instead of C17 for LK_C
4181e829d1db [LLDB][LoongArch] Fix build errors about NT_LOONGARCH_HW_{BREAK,WATCH} (#126020)
7436329bfee9 Revert "[clang] [ARM] Explicitly enable NEON for Windows/Darwin targets (#122095)"
a0c8959cc880 [X86] When expanding LCMPXCHG16B_SAVE_RBX, substitute RBX in base (#134109)
a8b5fe017a5e [libc++] Add missing release note for LLVM 20 about zip_view (#134144)
41aefdbebe64 cuda clang: Fix argument order for __reduce_max_sync (#132881)
19c2e1c12d47 [clang-tidy] Fix broken HeaderFilterRegex when read from config file (#133582)
ac31db0463c0 [Sanitizers][Darwin][Test] XFAIL malloc_zone.cpp
53141e4e3c65 [clang] Do not infer lifetimebound for functions with void return type (#131997)
cf7bb13f0c7f [TailDuplicator] Determine if computed gotos using `blockaddress` (#132536)
656289ffa0a6 Bump version to 20.1.3 (#134187)
58df0ef89dd6 (tag: llvmorg-20.1.2) Define LLVM_ABI and CLANG_ABI for __EMSCRIPTEN__ builds (#131578)
e256eda15377 [LoongArch][MC] Add relocation support for fld fst [x]vld [x]vst
ba00d9f641e9 [LoongArch] Pre-commit test for #133225
f07f96873aa8 Backport/20.x: [LoongArch] Fix the type of tls-le symbols
e7406753caf3 [PATCH] [clang][modules] Fix serialization and de-serialization of PCH module file refs (#105994) (#132802)
2f6c5807ca7e [workflows] Add missing -y option to apt-get for abi tests (#133337)
bc65196c0919 update test due to llvm/llvm-project#126880 not being backported
d6d1dbf22181 [ARM] Speedups for CombineBaseUpdate. (#129725)
5ba194972878 [MC,COFF] .safeseh: avoid changeSection (#132624)
943b43250b55 release/20.x: [clang][docs] Move -Wnontrivial-memcall to added flags. (#132367)
44a6f6abbdb6 [libcxx] [test] Fix restoring LLVM_DIR and Clang_DIR (#132838)
c1c4d7191d70 [clang-format] Allow `Language: Cpp` for C files (#133033)
2406e0d4467a Revert "[MC] Explicitly mark MCSymbol for MO_ExternalSymbol" (#133291)
3d5f5ef6b784 workflows: Add missing apt-get update to abi tests (#133264)
d1f5a9f66ee2 [hexagon] Bump the default version to v68 (#132304)
90cc9ca8bcb2 [Hexagon] Set the default compilation target to V68 (#125239)
3e2801eb634e [PowerPC] Support conversion between f16 and f128 (#130158)
d60baf3d4786 [HEXAGON] Fix semantics of ordered FP compares (#131089)
1a76c29a9ba8 [hexagon] Enable --eh-frame-hdr (#130225)
ecde8c235e5e [clang] fix matching of nested template template parameters
c86df914dee1 release/20.x: [Clang] Fix various bugs in alias CTAD transform
f7b6f23c6bb7 [llvm-dlltool] Add a missing dependency
a311bc81d957 [llvm-dlltool] Implement the --identify option (#127465)
6034661369c4 [LoongArch] Pre-commit test for fixing tls-le symbol type
95763651e25c [HEXAGON] Add support to lower "FREEZE a half(f16)" instruction on Hexagon and fix the isel-buildvector-v2f16.ll assertion (#130977)
e0e8071815c7 [hexagon] Prevent alignment search beyond a label (#130631)
2198410a8a8a [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425)
0383020b6c1a [llvm] Fix crash when complex deinterleaving operates on an unrolled loop (#129735)
dc7b743515d3 [AArch64] Fix SVE scalar fcopysign lowering without neon. (#129787)
fcd0ad23f668 [AArch64] Add test for scalar copysign. NFC
66825a89b8e0 [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289)
9710e9963455 [X86][AVX10.2] Include changes for COMX and VGETEXP from rev. 2 (#132824)
3f957cc67cff Bump version to 20.1.2 (#132293)
424c2d9b7e4d (tag: llvmorg-20.1.1) [libcxx] Add a missing include for __bit_iterator (#127015)
2cc53628fbe8 [SCEV] Check whether the start is non-zero in `ScalarEvolution::howFarToZero` (#131522)
0619bbcbbd86 [BPF] Add default cpu change in ReleaseNotes (#131691)
2dc152fb40db fix abi (again)
2044b18af046 fix abi
e3f0ce3ef803 [Clang] Do not emit nodiscard warnings for the base expr of static member access (#131450)
0ceb4efefeaa [CUDA][HIP] fix virtual dtor host/device attr (#128926)
1058e693f090 [libc++][test] Skip a `is_virtual_base_of` test for apple-clang-17 (#131438)
1f9d00524b8c [libc++] Forward-proof some tests for AppleClang 17
1515c4ac202d [LAA] Consider accessed addrspace when mapping underlying obj to access. (#129087)
1cfbb9f33436 Backport/20.x: [Clang] Fix an incorrect assumption on getTemplatedDecl()
0fcfeacd8b99 [BPF] Fix BitCast Assertion with NonZero AddrSpace
0b23d98dceaa Reduce memory usage in AST parent map generation by lazily checking if nodes have been seen (#129934)
073ae08864b4 AMDGPU: Fix broken broken negative test for gfx950 assembler (#129667) (#129686)
cb50aaf8a11b [llvm-objcopy] Apply encryptable offset to first segment, not section (#130517)
63e63f306128 [Clang] Fix an integer overflow issue in computing CTAD's parameter depth (#128704)
b09b05b8e7c3 [MemCpyOpt] Fix clobber check in fca2memcpy optimization
64ae6413559e [SystemZ] Move disabling of arg verification to before isFullyInternal(). (#130693)
548d057ebcfa [VectorCombine] scalarizeLoadExtract - don't create scalar loads if any extract is waiting to be erased (#129375)
7c154dad4d15 [Clang] Fix GPU intrinsic helpers incorrectly sign extending (#129560)
946780474f3b [libc++][test] extend XFAIL clauses to cover Amazon Linux too (#129377)
f09bcfbdc90b [LoongArch] Relax the restrictions of inlineasm operand modifier 'u' and 'w' (#129864)
f62b50e0e8f1 [ValueTracking] Skip incoming values that are the same as the phi in `isGuaranteedNotToBeUndefOrPoison` (#130111)
50343e517992 [HEXAGON] Fix hvx-isel for extract_subvector op (#129672)
0412f708c380 [TailDuplicator] Do not restrict the computed gotos (#114990)
72c4a3f419f4 [clang][test] Don't require specific alignment in test case (#130589)
fbb2a7e74d91 [clang] Reject constexpr-unknown values as constant expressions more consistently (#129952)
9010db1b84ef [Clang] Treat constexpr-unknown value as invalid in `EvaluateAsInitializer` (#128409)
32ce5b043c2b [AArch64] Fix BE popcount casts. (#129879)
05be3ca72e39 [AArch64] Add BE test coverage for popcount. NFC
0e96713a3b29 [ValueTracking] Bail out on x86_fp80 when computing fpclass with knownbits (#130477)
0fda7e633255 [X86][AVX10.2] Fix unexpected larger scope (#130767)
f7a4e3a4d45d [clang-format] Don't remove parentheses separated from ellipsis by comma (#130471)
1d4d84c89be6 [AArch64] Don't try to custom lower fp16 selects with nofp (#129492)
0064565bce3f [DAGCombiner] Don't ignore N2's undef elements in `foldVSelectOfConstants` (#129272)
54c90e4cdf2f [lldb] Fix manual CURSES_LIBRARIES tinfo finding (#128245)
712d3c7f0944 [lldb] Add terminfo dependency for ncurses support (#126810)
6525b151fe77 [Hexagon] Handle Call Operand vxi1 in Hexagon Backend (#128027)
dcc378e862de [libc++] Guard <codecvt> contents on _LIBCPP_HAS_LOCALIZATION (#129112)
0f5e7e86e38e [SystemZ] Add header guard macros to vecintrin.h (#129170)
5b552d780ae8 [LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966)
20adce87104c [libc++][ci] Update the Windows toolchains to Clang 19 (#129232)
0e537474ea59 Bump version to 20.1.1 (#130806)
Signed-off-by: Deepesh Varatharajan <[email protected]>
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The standard libcalls for half to float and float to half conversion are __extendhfsf2 and __truncsfhf2. However, LLVM currently uses __gnu_h2f_ieee and __gnu_f2h_ieee instead. As far as I can tell, these libcalls are an ARM-ism and only provided by libgcc on that platform. compiler-rt always provides both libcalls.
Use the standard libcalls by default, and only use the __gnu libcalls on ARM.