fix flang build

chelini · chelini · commit 93911408fbd4 · 2025-02-17T07:37:51.000+01:00
diff --git a/flang/include/flang/Optimizer/Support/InitFIR.h b/flang/include/flang/Optimizer/Support/InitFIR.h
@@ -112,7 +112,7 @@ inline void registerMLIRPassesForFortranTools() {
   mlir::affine::registerAffineLoopTilingPass();
   mlir::affine::registerAffineDataCopyGenerationPass();
 
-  mlir::registerConvertAffineToStandardPass();
+  mlir::registerLowerAffinePass();
 }
 
 /// Register the interfaces needed to lower to LLVM IR.
diff --git a/flang/lib/Optimizer/Passes/Pipelines.cpp b/flang/lib/Optimizer/Passes/Pipelines.cpp
@@ -205,7 +205,7 @@ void createDefaultFIROptimizerPassPipeline(mlir::PassManager &pm,
       pm, fir::createStackReclaim);
   // convert control flow to CFG form
   fir::addCfgConversionPass(pm, pc);
-  pm.addPass(mlir::createConvertSCFToCFPass());
+  pm.addPass(mlir::createSCFToControlFlowPass());
 
   pm.addPass(mlir::createCanonicalizerPass(config));
   pm.addPass(fir::createSimplifyRegionLite());

Original file line number	Diff line number	Diff line change
`@@ -112,7 +112,7 @@ inline void registerMLIRPassesForFortranTools() {`
`112`	`112`	`mlir::affine::registerAffineLoopTilingPass();`
`113`	`113`	`mlir::affine::registerAffineDataCopyGenerationPass();`
`114`	`114`
`115`		`- mlir::registerConvertAffineToStandardPass();`
	`115`	`+ mlir::registerLowerAffinePass();`
`116`	`116`	`}`
`117`	`117`
`118`	`118`	`/// Register the interfaces needed to lower to LLVM IR.`