|  | 
| 10 | 10 | #define MLIR_DIALECT_XEGPU_IR_XEGPUATTRS_TD | 
| 11 | 11 | 
 | 
| 12 | 12 | include "mlir/Dialect/XeGPU/IR/XeGPUDialect.td" | 
|  | 13 | +include "mlir/IR/EnumAttr.td" | 
| 13 | 14 | 
 | 
| 14 | 15 | class XeGPUAttr<string name, string attrMnemonic, list<Trait> traits = [], | 
| 15 | 16 |                 string baseCppClass = "::mlir::Attribute"> | 
| 16 | 17 |     : AttrDef<XeGPU_Dialect, name, traits, baseCppClass> { | 
| 17 | 18 |   let mnemonic = attrMnemonic; | 
| 18 | 19 | } | 
| 19 | 20 | 
 | 
|  | 21 | +def XeGPU_TensorDescAttr: XeGPUAttr<"TensorDesc", "tdesc_attr"> { | 
|  | 22 | +  let parameters = (ins | 
|  | 23 | +    OptionalParameter<"MemoryScopeAttr">: $memory_scope, | 
|  | 24 | +    OptionalParameter<"IntegerAttr", "1">: $array_length, | 
|  | 25 | +    OptionalParameter<"BoolAttr", "true">: $boundary_check | 
|  | 26 | +  ); | 
|  | 27 | + | 
|  | 28 | +  let builders = [ | 
|  | 29 | +    AttrBuilder<(ins | 
|  | 30 | +      CArg<"xegpu::MemoryScope", "xegpu::MemoryScope::Global">:$memory_scope, | 
|  | 31 | +      CArg<"int", "1">:$array_length, | 
|  | 32 | +      CArg<"bool", "true">: $boundary_check | 
|  | 33 | +    )> | 
|  | 34 | +  ]; | 
|  | 35 | + | 
|  | 36 | +  let assemblyFormat = "`<` struct(params) `>`"; | 
|  | 37 | +} | 
|  | 38 | + | 
|  | 39 | +//===----------------------------------------------------------------------===// | 
|  | 40 | +// XeGPU Memory Scope Enums. | 
|  | 41 | +//===----------------------------------------------------------------------===// | 
|  | 42 | +def XeGPU_MemoryScopeGlobal: I32EnumAttrCase<"Global", 0, "global">; | 
|  | 43 | +def XeGPU_MemoryScopeShared: I32EnumAttrCase<"SLM", 1, "slm">; | 
|  | 44 | +def XeGPU_MemoryScope: I32EnumAttr<"MemoryScope",  | 
|  | 45 | +      "The address space of the memory the tensor descritor is created for",  | 
|  | 46 | +      [XeGPU_MemoryScopeGlobal, XeGPU_MemoryScopeShared]> { | 
|  | 47 | +  let genSpecializedAttr = 0; | 
|  | 48 | +  let cppNamespace = "::mlir::xegpu"; | 
|  | 49 | +} | 
|  | 50 | + | 
|  | 51 | +def XeGPU_MemoryScopeAttr:  | 
|  | 52 | +  EnumAttr<XeGPU_Dialect, XeGPU_MemoryScope, "memory_scope"> { | 
|  | 53 | +    let assemblyFormat = "$value"; | 
|  | 54 | +} | 
|  | 55 | + | 
|  | 56 | +//===----------------------------------------------------------------------===// | 
|  | 57 | +// XeGPU Cache Enums. | 
|  | 58 | +//===----------------------------------------------------------------------===// | 
|  | 59 | +def XeGPU_CachePolicyCached:        I32EnumAttrCase<"CACHED", 0, "cached">;                    // valid for read and write | 
|  | 60 | +def XeGPU_CachePolicyUncached:      I32EnumAttrCase<"UNCACHED", 1, "uncached">;                // valid for read and write | 
|  | 61 | +def XeGPU_CachePolicyStreaming:     I32EnumAttrCase<"STREAMING", 2, "streaming">;              // valid for read only | 
|  | 62 | +def XeGPU_CachePolicyInvalid:       I32EnumAttrCase<"READ_INVALIDATE", 3, "read_invalidate">;  // valid for read only | 
|  | 63 | +def XeGPU_CachePolicyWriteBack:     I32EnumAttrCase<"WRITE_BACK", 4, "write_back">;            // valid for write only | 
|  | 64 | +def XeGPU_CachePolicyWriteThrough:  I32EnumAttrCase<"WRITE_THROUGH", 5, "write_through">;      // valid for write only | 
|  | 65 | + | 
|  | 66 | +def XeGPU_CachePolicyEnums : I32EnumAttr<"CachePolicy", "Cache policy",  | 
|  | 67 | +  [XeGPU_CachePolicyCached, XeGPU_CachePolicyUncached,  | 
|  | 68 | +   XeGPU_CachePolicyStreaming, XeGPU_CachePolicyInvalid, | 
|  | 69 | +   XeGPU_CachePolicyWriteBack, XeGPU_CachePolicyWriteThrough]> { | 
|  | 70 | +  let genSpecializedAttr = 0; | 
|  | 71 | +  let cppNamespace = "::mlir::xegpu"; | 
|  | 72 | +} | 
|  | 73 | + | 
|  | 74 | +def XeGPU_CacheHintAttr  | 
|  | 75 | +  : EnumAttr<XeGPU_Dialect, XeGPU_CachePolicyEnums, "cache_hint"> { | 
|  | 76 | +    let assemblyFormat = "`<` $value `>`"; | 
|  | 77 | +} | 
|  | 78 | + | 
|  | 79 | + | 
|  | 80 | + | 
| 20 | 81 | #endif // MLIR_DIALECT_XEGPU_IR_XEGPUATTRS_TD | 
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