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Aurabindo Pillaialexdeucher
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drm/amd/display: Add debugfs interface for ODM combine info
[Why] For use with IGT tests in userspace, the number of ODM segments in use is required to be exposed to userspace to verify that ODM Combine is working as expected when special timings are committed. [How] Add a connector specific debugfs entry that prints the number of ODM segments in use. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

Lines changed: 32 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1201,6 +1201,35 @@ static int internal_display_show(struct seq_file *m, void *data)
12011201
return 0;
12021202
}
12031203

1204+
/*
1205+
* Returns the number of segments used if ODM Combine mode is enabled.
1206+
* Example usage: cat /sys/kernel/debug/dri/0/DP-1/odm_combine_segments
1207+
*/
1208+
static int odm_combine_segments_show(struct seq_file *m, void *unused)
1209+
{
1210+
struct drm_connector *connector = m->private;
1211+
struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
1212+
struct dc_link *link = aconnector->dc_link;
1213+
struct pipe_ctx *pipe_ctx = NULL;
1214+
int i, segments = 0;
1215+
1216+
for (i = 0; i < MAX_PIPES; i++) {
1217+
pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
1218+
if (pipe_ctx->stream &&
1219+
pipe_ctx->stream->link == link)
1220+
break;
1221+
}
1222+
1223+
if (connector->status != connector_status_connected)
1224+
return -ENODEV;
1225+
1226+
if (pipe_ctx != NULL && pipe_ctx->stream_res.tg->funcs->get_odm_combine_segments)
1227+
pipe_ctx->stream_res.tg->funcs->get_odm_combine_segments(pipe_ctx->stream_res.tg, &segments);
1228+
1229+
seq_printf(m, "%d\n", segments);
1230+
return 0;
1231+
}
1232+
12041233
/* function description
12051234
*
12061235
* generic SDP message access for testing
@@ -2713,6 +2742,7 @@ DEFINE_SHOW_ATTRIBUTE(dmub_tracebuffer);
27132742
DEFINE_SHOW_ATTRIBUTE(dp_lttpr_status);
27142743
DEFINE_SHOW_ATTRIBUTE(hdcp_sink_capability);
27152744
DEFINE_SHOW_ATTRIBUTE(internal_display);
2745+
DEFINE_SHOW_ATTRIBUTE(odm_combine_segments);
27162746
DEFINE_SHOW_ATTRIBUTE(psr_capability);
27172747
DEFINE_SHOW_ATTRIBUTE(dp_is_mst_connector);
27182748
DEFINE_SHOW_ATTRIBUTE(dp_mst_progress_status);
@@ -2991,7 +3021,8 @@ static const struct {
29913021
} connector_debugfs_entries[] = {
29923022
{"force_yuv420_output", &force_yuv420_output_fops},
29933023
{"trigger_hotplug", &trigger_hotplug_debugfs_fops},
2994-
{"internal_display", &internal_display_fops}
3024+
{"internal_display", &internal_display_fops},
3025+
{"odm_combine_segments", &odm_combine_segments_fops}
29953026
};
29963027

29973028
/*

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -98,6 +98,30 @@ static void optc32_set_odm_combine(struct timing_generator *optc, int *opp_id, i
9898
optc1->opp_count = opp_cnt;
9999
}
100100

101+
void optc32_get_odm_combine_segments(struct timing_generator *tg, int *odm_combine_segments)
102+
{
103+
struct optc *optc1 = DCN10TG_FROM_TG(tg);
104+
int segments;
105+
106+
REG_GET(OPTC_DATA_SOURCE_SELECT, OPTC_NUM_OF_INPUT_SEGMENT, &segments);
107+
108+
switch (segments) {
109+
case 0:
110+
*odm_combine_segments = 1;
111+
break;
112+
case 1:
113+
*odm_combine_segments = 2;
114+
break;
115+
case 3:
116+
*odm_combine_segments = 4;
117+
break;
118+
/* 2 is reserved */
119+
case 2:
120+
default:
121+
*odm_combine_segments = -1;
122+
}
123+
}
124+
101125
void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)
102126
{
103127
struct optc *optc1 = DCN10TG_FROM_TG(optc);
@@ -303,6 +327,7 @@ static struct timing_generator_funcs dcn32_tg_funcs = {
303327
.set_dwb_source = NULL,
304328
.set_odm_bypass = optc32_set_odm_bypass,
305329
.set_odm_combine = optc32_set_odm_combine,
330+
.get_odm_combine_segments = optc32_get_odm_combine_segments,
306331
.set_h_timing_div_manual_mode = optc32_set_h_timing_div_manual_mode,
307332
.get_optc_source = optc2_get_optc_source,
308333
.set_out_mux = optc3_set_out_mux,

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -180,5 +180,6 @@
180180

181181
void dcn32_timing_generator_init(struct optc *optc1);
182182
void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode);
183+
void optc32_get_odm_combine_segments(struct timing_generator *tg, int *odm_combine_segments);
183184

184185
#endif /* __DC_OPTC_DCN32_H__ */

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -309,6 +309,7 @@ struct timing_generator_funcs {
309309
*/
310310
void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt,
311311
struct dc_crtc_timing *timing);
312+
void (*get_odm_combine_segments)(struct timing_generator *tg, int *odm_segments);
312313
void (*set_h_timing_div_manual_mode)(struct timing_generator *optc, bool manual_mode);
313314
void (*set_gsl)(struct timing_generator *optc, const struct gsl_params *params);
314315
void (*set_gsl_source_select)(struct timing_generator *optc,

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