@@ -222,6 +222,12 @@ class SPIRVToOCLBase : public InstVisitor<SPIRVToOCLBase> {
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// / - OCL1.2: barrier
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virtual void visitCallSPIRVControlBarrier (CallInst *CI) = 0;
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+ // / Transform split __spirv_ControlBarrierArriveINTEL and
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+ // / __spirv_ControlBarrierWaitINTEL barrier to:
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+ // / - OCL2.0: overload with a memory_scope argument
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+ // / - OCL1.2: overload with no memory_scope argument
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+ virtual void visitCallSPIRVSplitBarrierINTEL (CallInst *CI, Op OC) = 0;
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+
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// / Transform __spirv_EnqueueKernel to __enqueue_kernel
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virtual void visitCallSPIRVEnqueueKernel (CallInst *CI, Op OC) = 0;
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@@ -305,6 +311,11 @@ class SPIRVToOCL12Base : public SPIRVToOCLBase {
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// / barrier(flag(sema))
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void visitCallSPIRVControlBarrier (CallInst *CI) override ;
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+ // / Transform split __spirv_ControlBarrierArriveINTEL and
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+ // / __spirv_ControlBarrierWaitINTEL barrier to overloads without a
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+ // / memory_scope argument.
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+ void visitCallSPIRVSplitBarrierINTEL (CallInst *CI, Op OC) override ;
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+
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// / Transform __spirv_OpAtomic functions. It firstly conduct generic
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// / mutations for all builtins and then mutate some of them seperately
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Instruction *visitCallSPIRVAtomicBuiltin (CallInst *CI, Op OC) override ;
@@ -394,6 +405,11 @@ class SPIRVToOCL20Base : public SPIRVToOCLBase {
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// / sub_group_barrier(flag(sema), map(memScope))
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void visitCallSPIRVControlBarrier (CallInst *CI) override ;
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+ // / Transform split __spirv_ControlBarrierArriveINTEL and
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+ // / __spirv_ControlBarrierWaitINTEL barrier to overloads with a
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+ // / memory_scope argument.
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+ void visitCallSPIRVSplitBarrierINTEL (CallInst *CI, Op OC) override ;
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+
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// / Transform __spirv_Atomic* to atomic_*.
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// / __spirv_Atomic*(atomic_op, scope, sema, ops, ...) =>
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// / atomic_*(generic atomic_op, ops, ..., order(sema), map(scope))
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