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Merge pull request zephyrproject-rtos#6 from dcpleung/sof_zephyr
Update code to boot on QEMU and UP Squared board
2 parents 6c2b616 + 5190276 commit 4a6dd9c

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-154
lines changed

30 files changed

+2066
-154
lines changed

‎boards/xtensa/up_squared_adsp/tools/logtool.py‎

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#!/usr/bin/python3
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3+
#FILE = "/dev/shm/qemu-bridge-hp-sram-mem"
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FILE = "/sys/kernel/debug/sof/etrace"
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#OFFSET = 0x8000
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OFFSET = 0x0
7+
MAGIC = 0x55aa
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SLOT_NUM = 32
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SLOT_LEN = 256
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11+
def read_id(f):
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buf = f.read(2)
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return int.from_bytes(buf, byteorder='little')
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15+
def read_magic(f):
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buf = f.read(2)
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return int.from_bytes(buf, byteorder='little')
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19+
def read_log_slot(f):
20+
magic = read_magic(f)
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22+
if magic == MAGIC:
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id = read_id(f)
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slot = f.read(SLOT_LEN - 4)
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logstr = slot.decode(errors='replace').split('\r', 1)[0]
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print("id %d %s" % (id, logstr))
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# Open a file
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f = open(FILE, "rb")
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for x in range(0, SLOT_NUM):
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f.seek(OFFSET + x * SLOT_LEN)
33+
read_log_slot(f)

‎boards/xtensa/up_squared_adsp/tools/zephyr_adsp_logger/.gitignore‎

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zephyr_adsp_logger
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*.o

‎boards/xtensa/up_squared_adsp/tools/zephyr_adsp_logger/Makefile‎

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.PHONY: all clean
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.SECONDARY:
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CFLAGS = -march=native -O2 -g
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EXECUTABLES = zephyr_adsp_logger
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all: $(EXECUTABLES)
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clean:
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rm -f $(EXECUTABLES)
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%.o: %.c
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$(C) $(CFLAGS) -c $< -o $@

‎boards/xtensa/up_squared_adsp/tools/zephyr_adsp_logger/zephyr_adsp_logger.c‎

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#include <errno.h>
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#include <limits.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <unistd.h>
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#define MAGIC 0x55AA
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struct config_t {
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char *infile;
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unsigned long int trace_size;
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unsigned long int buf_size;
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unsigned long int interval_usecs;
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} cfg;
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struct log_t {
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uint16_t magic;
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uint16_t id;
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char log[0];
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};
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char *sof_etrace_path = "/sys/kernel/debug/sof/etrace";
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char *qemu_etrace_path = "/dev/shm/qemu-bridge-etrace-mem";
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unsigned long int default_trace_size = 0x2000;
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unsigned long int default_buf_size = 256;
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void usage(char *prog_name)
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{
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fprintf(stdout, "Usage: %s [options]\n\n", prog_name);
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fprintf(stdout, "Options:\n");
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fprintf(stdout, " -s : Use %s as input\n", sof_etrace_path);
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fprintf(stdout, " -q : Use %s as input\n", qemu_etrace_path);
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fprintf(stdout, " -i infile : Use infile as input\n");
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fprintf(stdout, "\n");
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fprintf(stdout,
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" -t size : Size of the trace buffer (in bytes, default %lu)\n",
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default_trace_size);
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fprintf(stdout,
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" -b size : Size of buffer of one log line (in bytes, default %lu)\n",
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default_buf_size);
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fprintf(stdout, "\n");
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fprintf(stdout,
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" -n usecs : Read logs with update interval (microseconds, default is to read once)\n");
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}
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int read_logs()
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{
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FILE *fd;
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int ret;
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unsigned long int offset;
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struct log_t *log;
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uint8_t *buf = NULL;
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char *log_buf = NULL;
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unsigned int max_log_strlen;
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max_log_strlen = cfg.buf_size - sizeof(log->magic) - sizeof(log->id);
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/* Open file */
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fd = fopen(cfg.infile, "rb");
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if (!fd) {
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fprintf(stderr,
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"[ERROR] Cannot open %s for reading!\n", cfg.infile);
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ret = -1;
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goto read_out;
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}
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71+
/* Allocate buffers */
72+
buf = malloc(cfg.trace_size);
73+
if (!buf) {
74+
fprintf(stderr,
75+
"[ERROR] Cannot allocate trace buffer!\n");
76+
ret = -2;
77+
goto read_out;
78+
}
79+
80+
log_buf = malloc(cfg.buf_size + 1);
81+
if (!log_buf) {
82+
fprintf(stderr,
83+
"[ERROR] Cannot allocate log buffer!\n");
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ret = -2;
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goto read_out;
86+
}
87+
88+
read_repeat:
89+
fprintf(stdout, "\n");
90+
91+
/* Read everything in file */
92+
rewind(fd);
93+
ret = fread(buf, 1, cfg.trace_size, fd);
94+
if (ret == 0) {
95+
fprintf(stderr,
96+
"[ERROR] Nothing to read?\n");
97+
ret = -3;
98+
goto read_out;
99+
}
100+
101+
/* Go through each log line and display it */
102+
offset = 0;
103+
while ((offset + cfg.buf_size) <= cfg.trace_size) {
104+
log = (struct log_t *)(buf + offset);
105+
106+
if (log->magic == MAGIC) {
107+
/* Avoid non-null terminated strings */
108+
ret = snprintf(log_buf, max_log_strlen,
109+
"%s", &log->log[0]);
110+
log_buf[max_log_strlen] = 0;
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112+
fprintf(stdout, "[ID:%5u] %s", log->id, log_buf);
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}
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/* Move to next log line */
116+
offset += cfg.buf_size;
117+
};
118+
119+
/* If interval is specified, wait and loop */
120+
if (cfg.interval_usecs) {
121+
usleep(cfg.interval_usecs);
122+
goto read_repeat;
123+
}
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125+
ret = 0;
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read_out:
128+
if (buf) {
129+
free(buf);
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}
131+
if (log_buf) {
132+
free(log_buf);
133+
}
134+
if (fd) {
135+
fclose(fd);
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}
137+
return ret;
138+
}
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int main(int argc, char *argv[])
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{
142+
int opt, ret = 0;
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/* Defaults */
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cfg.infile = sof_etrace_path;
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cfg.trace_size = default_trace_size;
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cfg.buf_size = default_buf_size;
148+
cfg.interval_usecs = 0;
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150+
/* Parse arguments */
151+
while ((opt = getopt(argc, argv, "hsqi:t:b:n:")) != -1) {
152+
switch (opt) {
153+
case 's':
154+
cfg.infile = sof_etrace_path;
155+
break;
156+
case 'q':
157+
cfg.infile = qemu_etrace_path;
158+
break;
159+
case 'i':
160+
cfg.infile = optarg;
161+
break;
162+
case 't':
163+
cfg.trace_size = strtoul(optarg, NULL, 0);
164+
if (cfg.trace_size == ULONG_MAX) {
165+
fprintf(stderr, "[ERROR] Error parsing -t\n");
166+
ret = errno;
167+
goto main_out;
168+
}
169+
break;
170+
case 'b':
171+
cfg.buf_size = strtoul(optarg, NULL, 0);
172+
if (cfg.buf_size == ULONG_MAX) {
173+
fprintf(stderr, "[ERROR] Error parsing -b\n");
174+
ret = errno;
175+
goto main_out;
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}
177+
break;
178+
case 'n':
179+
cfg.interval_usecs = strtoul(optarg, NULL, 0);
180+
if (cfg.interval_usecs == ULONG_MAX) {
181+
fprintf(stderr, "[ERROR] Error parsing -n\n");
182+
ret = errno;
183+
goto main_out;
184+
}
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break;
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case 'h':
187+
default:
188+
usage(argv[0]);
189+
goto main_out;
190+
}
191+
}
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193+
fprintf(stdout, "[INFO ] Using %s as input file\n", cfg.infile);
194+
fprintf(stdout, "[INFO ] Trace buffer size: %lu\n", cfg.trace_size);
195+
fprintf(stdout, "[INFO ] Log line buffer size: %lu\n", cfg.buf_size);
196+
if (cfg.interval_usecs == 0) {
197+
fprintf(stdout, "[INFO ] Read once\n");
198+
} else {
199+
fprintf(stdout, "[INFO ] Update Interval: %lu\n",
200+
cfg.interval_usecs);
201+
}
202+
203+
ret = read_logs();
204+
205+
main_out:
206+
return ret;
207+
}

‎samples/audio/sof/prj.conf‎

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11
CONFIG_SOF=y
22
CONFIG_LOG=y
33
CONFIG_LOG_BACKEND_XTENSA_SIM=y
4+
CONFIG_LOG_BACKEND_ADSP=y
45
CONFIG_LOG_IMMEDIATE=y
56
CONFIG_SOF_LOG_LEVEL=4
67
# SOF requires malloc/calloc

‎samples/hello_world/src/main.c‎

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@@ -7,80 +7,7 @@
77
#include <zephyr.h>
88
#include <sys/printk.h>
99

10-
#include <stdint.h>
11-
12-
#include <xtensa/config/core.h>
13-
#include <xtensa/hal.h>
14-
15-
#define CONFIG_TRACE 1
16-
17-
/* SRAM window 0 FW "registers" */
18-
#define SRAM_REG_ROM_STATUS 0x0
19-
#define SRAM_REG_FW_STATUS 0x4
20-
#define SRAM_REG_FW_TRACEP 0x8
21-
#define SRAM_REG_FW_IPC_RECEIVED_COUNT 0xc
22-
#define SRAM_REG_FW_IPC_PROCESSED_COUNT 0x10
23-
#define SRAM_REG_FW_END 0x14
24-
25-
#define HP_SRAM_BASE 0xBE000000
26-
#define HEAP_HP_BUFFER_BASE HP_SRAM_BASE
27-
#define HEAP_HP_BUFFER_SIZE 0x8000
28-
#define SRAM_WND_BASE (HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE)
29-
#define SRAM_SW_REG_BASE (SRAM_INBOX_BASE + SRAM_INBOX_SIZE)
30-
#define MAILBOX_SW_REG_BASE SRAM_SW_REG_BASE
31-
32-
#define SRAM_TRACE_BASE SRAM_WND_BASE
33-
#if CONFIG_TRACE
34-
#define SRAM_TRACE_SIZE 0x2000
35-
#else
36-
#define SRAM_TRACE_SIZE 0
37-
#endif
38-
#define SRAM_DEBUG_BASE (SRAM_TRACE_BASE + SRAM_TRACE_SIZE)
39-
#define SRAM_DEBUG_SIZE 0x800
40-
#define SRAM_EXCEPT_BASE (SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE)
41-
#define SRAM_EXCEPT_SIZE 0x800
42-
#define SRAM_STREAM_BASE (SRAM_EXCEPT_BASE + SRAM_EXCEPT_SIZE)
43-
#define SRAM_STREAM_SIZE 0x1000
44-
#define SRAM_INBOX_BASE (SRAM_STREAM_BASE + SRAM_STREAM_SIZE)
45-
#define SRAM_INBOX_SIZE 0x2000
46-
47-
#define DCACHE_LINE_SIZE XCHAL_DCACHE_LINESIZE
48-
49-
static inline void dcache_writeback_region(void *addr, size_t size)
50-
{
51-
#if XCHAL_DCACHE_SIZE > 0
52-
xthal_dcache_region_writeback(addr, size);
53-
#endif
54-
}
55-
56-
static inline void mailbox_sw_reg_write(size_t offset, uint32_t src)
57-
{
58-
*((volatile uint32_t*)(MAILBOX_SW_REG_BASE + offset)) = src;
59-
dcache_writeback_region((void *)(MAILBOX_SW_REG_BASE + offset),
60-
sizeof(src));
61-
}
62-
63-
/* Platform defined trace code */
64-
#define platform_trace_point(__x) \
65-
mailbox_sw_reg_write(SRAM_REG_FW_TRACEP, (__x))
66-
67-
68-
#define SHIM_BASE 0x00001000
69-
70-
static inline uint32_t shim_read(uint32_t reg)
71-
{
72-
return *((volatile uint32_t*)(SHIM_BASE + reg));
73-
}
74-
75-
static inline void shim_write(uint32_t reg, uint32_t val)
76-
{
77-
*((volatile uint32_t*)(SHIM_BASE + reg)) = val;
78-
}
79-
8010
void main(void)
8111
{
82-
mailbox_sw_reg_write(SRAM_REG_ROM_STATUS, 0xabbac0fe);
83-
#if 0
84-
platform_trace_point(0xabbac0ffe);
85-
#endif
12+
printk("Hello World! %s\n", CONFIG_BOARD);
8613
}

‎soc/xtensa/intel_apl_adsp/include/config.h‎

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#include "sof_config.h"

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