|
| 1 | +## Preamble |
| 2 | + |
| 3 | + EIP: <to be assigned> |
| 4 | + Title: Bitwise shifting instructions in EVM |
| 5 | + Author: Alex Beregszaszi, Paweł Bylica |
| 6 | + Type: Standard Track |
| 7 | + Category Core |
| 8 | + Status: Draft |
| 9 | + Created: 2017-02-13 |
| 10 | + |
| 11 | + |
| 12 | +## Simple Summary |
| 13 | + |
| 14 | +To provide native bitwise shifting with cost on par with other arithmetic operations. |
| 15 | + |
| 16 | +## Abstract |
| 17 | + |
| 18 | +Native bitwise shifting instructions are introduced, which are more efficient processing wise on the host and are cheaper to user by a contract. |
| 19 | + |
| 20 | +## Motivation |
| 21 | + |
| 22 | +EVM is lacking bitwise shifting operators, but supports other logical and arithmetic operators. Shift operations can be implemented via arithmetic operators, but that has a higher cost and requires more processing time from the host. Implementing `SHL` and `SHR` using arithmetics cost each 35 gas, while the proposed instructions take 3 gas. |
| 23 | + |
| 24 | +## Specification |
| 25 | + |
| 26 | +The following instructions are introduced: |
| 27 | + |
| 28 | +### `0x1b`: `SHL` (shift left) |
| 29 | + |
| 30 | +The `SHL` instruction (shift left) pops 2 values from the stack, `arg1` and `arg2`, and pushes on the stack the second popped value `arg2` shifted to the left by the number of bits in the first popped value `arg1`. The result is equal to |
| 31 | + |
| 32 | +``` |
| 33 | +(arg2 * 2^arg1) mod 2^256 |
| 34 | +``` |
| 35 | + |
| 36 | +Notes: |
| 37 | +- If the shift amount is greater or equal 256 the result is 0. |
| 38 | + |
| 39 | +### `0x1c`: `SHR` (logical shift right) |
| 40 | + |
| 41 | +The `SHR` instruction (logical shift right) pops 2 values from the stack, `arg1` and `arg2`, and pushes on the stack the second popped value `arg2` shifted to the right by the number of bits in the first popped value `arg1` with zero fill. The result is equal to |
| 42 | + |
| 43 | +``` |
| 44 | +arg2 udiv 2^arg1 |
| 45 | +``` |
| 46 | + |
| 47 | +Notes: |
| 48 | +- If the shift amount is greater or equal 256 the result is 0. |
| 49 | + |
| 50 | +### `0x1d`: `SAR` (arithmetic shift right) |
| 51 | + |
| 52 | +The `SAR` instruction (arithmetic shift right) pops 2 values from the stack, `arg1` and `arg2`, and pushes on the stack the second popped value `arg2` shifted to the right by the number of bits in the first popped value `arg1` with sign extension. The result is equal to |
| 53 | + |
| 54 | +``` |
| 55 | +arg2 sdiv 2^arg1 |
| 56 | +``` |
| 57 | + |
| 58 | +Notes: |
| 59 | +- `arg1` is interpreted as unsigned number. |
| 60 | +- If the shift amount is greater or equal 256 the result is 0 if `arg2` is non-negative or -1 if `arg2` is negative. |
| 61 | + |
| 62 | +### `0x1e`: `ROL` (rotate left) |
| 63 | + |
| 64 | +The `ROL` instruction (rotate left) pops 2 values from the stack, `arg1` and `arg2`, and pushes on the stack the second popped value `arg2` circular shifted to the left by the number of bits in the first popped value `arg1`. |
| 65 | + |
| 66 | +``` |
| 67 | +(arg1 shl arg2) or (arg1 shr (256 - arg2) |
| 68 | +``` |
| 69 | + |
| 70 | +Notes: |
| 71 | +- `arg2 rol arg1` is equivalent of `arg2 rol (arg1 mod 2^256)` |
| 72 | + |
| 73 | +### `0x1f`: `ROR` (rotate right) |
| 74 | + |
| 75 | +The `ROL` instruction (rotate right) pops 2 values from the stack, `arg1` and `arg2`, and pushes on the stack the second popped value `arg2` circular shifted to the right by the number of bits in the first popped value `arg1`. |
| 76 | + |
| 77 | +``` |
| 78 | +(arg1 shr arg2) or (arg1 shl (256 - arg2) |
| 79 | +``` |
| 80 | + |
| 81 | +Notes: |
| 82 | +- `arg2 ror arg1` is equivalent of `arg2 ror (arg1 mod 2^256)` |
| 83 | + |
| 84 | +The cost of the shift instructions is set at `verylow` tier (3 gas), while the rotations are 12 gas each. |
| 85 | + |
| 86 | +## Rationale |
| 87 | + |
| 88 | +Instruction operands were chosen to match the other logical and arithmetic instructions. |
| 89 | + |
| 90 | +## Backwards Compatibility |
| 91 | + |
| 92 | +The newly introduced instructions have no effect on bytecode created in the past. |
| 93 | + |
| 94 | +## Test Cases |
| 95 | + |
| 96 | +Test cases for an implementation are mandatory for EIPs that are affecting consensus changes. Other EIPs can choose to include links to test cases if applicable. |
| 97 | + |
| 98 | +## Implementation |
| 99 | + |
| 100 | +Client support: |
| 101 | +TBA |
| 102 | + |
| 103 | +Compiler support: |
| 104 | +- Solidity: https://github.com/ethereum/solidity/tree/asm-bitshift |
| 105 | + |
| 106 | +## Copyright |
| 107 | + |
| 108 | +Copyright and related rights waived via [CC0](https://creativecommons.org/publicdomain/zero/1.0/). |
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