From 994234e4cec43d7cb9aeda323c0eb488e4e785f7 Mon Sep 17 00:00:00 2001 From: Tanner Gooding Date: Fri, 30 Sep 2022 10:33:49 -0700 Subject: [PATCH 1/2] Ensure NI_Vector128_AsVector128 (aka `Vector128 AsVector128(this Vector value)`) doesn't have a side-effect in its assert --- src/coreclr/jit/hwintrinsicxarch.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/coreclr/jit/hwintrinsicxarch.cpp b/src/coreclr/jit/hwintrinsicxarch.cpp index f8e8a38695ba04..cf54dd0258f6be 100644 --- a/src/coreclr/jit/hwintrinsicxarch.cpp +++ b/src/coreclr/jit/hwintrinsicxarch.cpp @@ -702,8 +702,11 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic, { assert(sig->numArgs == 1); assert(HWIntrinsicInfo::BaseTypeFromFirstArg(intrinsic)); - assert(simdBaseJitType == - getBaseJitTypeAndSizeOfSIMDType(info.compCompHnd->getArgClass(sig, sig->args), &simdSize)); + + varTypes op1SimdBaseJitType = + getBaseJitTypeAndSizeOfSIMDType(info.compCompHnd->getArgClass(sig, sig->args), &simdSize); + + assert(simdBaseJitType == op1SimdBaseJitType); switch (getSIMDTypeForSize(simdSize)) { From aea8b4a8ed20745eca36550baf86cccc64abc6bb Mon Sep 17 00:00:00 2001 From: Tanner Gooding Date: Fri, 30 Sep 2022 11:19:20 -0700 Subject: [PATCH 2/2] CorInfoType no var_types --- src/coreclr/jit/hwintrinsicxarch.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/hwintrinsicxarch.cpp b/src/coreclr/jit/hwintrinsicxarch.cpp index cf54dd0258f6be..0992e70bec3d97 100644 --- a/src/coreclr/jit/hwintrinsicxarch.cpp +++ b/src/coreclr/jit/hwintrinsicxarch.cpp @@ -703,7 +703,7 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic, assert(sig->numArgs == 1); assert(HWIntrinsicInfo::BaseTypeFromFirstArg(intrinsic)); - varTypes op1SimdBaseJitType = + CorInfoType op1SimdBaseJitType = getBaseJitTypeAndSizeOfSIMDType(info.compCompHnd->getArgClass(sig, sig->args), &simdSize); assert(simdBaseJitType == op1SimdBaseJitType);