Renaming to DotProductRotateComplex

jacob-crawley · jacob-crawley · commit cf305c12c981 · 2025-07-16T17:17:28.000+01:00
diff --git a/src/coreclr/jit/hwintrinsic.h b/src/coreclr/jit/hwintrinsic.h
@@ -1275,7 +1275,7 @@ struct HWIntrinsicInfo
             }
 
             case NI_Sve_MultiplyAddRotateComplexBySelectedScalar:
-            case NI_Sve2_DotProductComplexBySelectedIndex:
+            case NI_Sve2_DotProductRotateComplexBySelectedIndex:
             {
                 assert(sig->numArgs == 5);
                 *imm1Pos = 0;
diff --git a/src/coreclr/jit/hwintrinsicarm64.cpp b/src/coreclr/jit/hwintrinsicarm64.cpp
@@ -485,7 +485,7 @@ void HWIntrinsicInfo::lookupImmBounds(
                 break;
 
             case NI_Sve_MultiplyAddRotateComplex:
-            case NI_Sve2_DotProductComplex:
+            case NI_Sve2_DotProductRotateComplex:
                 immLowerBound = 0;
                 immUpperBound = 3;
                 break;
@@ -511,7 +511,7 @@ void HWIntrinsicInfo::lookupImmBounds(
                 }
                 break;
 
-            case NI_Sve2_DotProductComplexBySelectedIndex:
+            case NI_Sve2_DotProductRotateComplexBySelectedIndex:
                 if (immNumber == 1)
                 {
                     // Bounds for rotation
@@ -3215,7 +3215,7 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic        intrinsic,
         }
 
         case NI_Sve_MultiplyAddRotateComplexBySelectedScalar:
-        case NI_Sve2_DotProductComplexBySelectedIndex:
+        case NI_Sve2_DotProductRotateComplexBySelectedIndex:
         {
             assert(sig->numArgs == 5);
             assert(!isScalar);
diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp
@@ -2737,7 +2737,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
                 GetEmitter()->emitInsSve_R_R_R(ins, emitSize, targetReg, op3Reg, op1Reg, INS_OPTS_SCALABLE_D);
                 break;
 
-            case NI_Sve2_DotProductComplex:
+            case NI_Sve2_DotProductRotateComplex:
             {
                 assert(isRMW);
                 assert(hasImmediateOperand);
@@ -2758,7 +2758,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
                 break;
             }
 
-            case NI_Sve2_DotProductComplexBySelectedIndex:
+            case NI_Sve2_DotProductRotateComplexBySelectedIndex:
             {
                 assert(isRMW);
                 assert(hasImmediateOperand);
diff --git a/src/coreclr/jit/hwintrinsiclistarm64sve.h b/src/coreclr/jit/hwintrinsiclistarm64sve.h
@@ -334,8 +334,8 @@ HARDWARE_INTRINSIC(Sve2,          BitwiseClearXor,
 HARDWARE_INTRINSIC(Sve2,          BitwiseSelect,                                                    -1,      3,     {INS_sve_bsl,        INS_sve_bsl,        INS_sve_bsl,        INS_sve_bsl,        INS_sve_bsl,        INS_sve_bsl,        INS_sve_bsl,        INS_sve_bsl,        INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
 HARDWARE_INTRINSIC(Sve2,          BitwiseSelectLeftInverted,                                        -1,      3,     {INS_sve_bsl1n,      INS_sve_bsl1n,      INS_sve_bsl1n,      INS_sve_bsl1n,      INS_sve_bsl1n,      INS_sve_bsl1n,      INS_sve_bsl1n,      INS_sve_bsl1n,      INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
 HARDWARE_INTRINSIC(Sve2,          BitwiseSelectRightInverted,                                       -1,      3,     {INS_sve_bsl2n,      INS_sve_bsl2n,      INS_sve_bsl2n,      INS_sve_bsl2n,      INS_sve_bsl2n,      INS_sve_bsl2n,      INS_sve_bsl2n,      INS_sve_bsl2n,      INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sve2,          DotProductComplex,                                                -1,      4,     {INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_sve_cdot,       INS_invalid,        INS_sve_cdot,       INS_invalid,        INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_HasImmediateOperand)
-HARDWARE_INTRINSIC(Sve2,          DotProductComplexBySelectedIndex,                                 -1,      5,     {INS_sve_cdot,       INS_invalid,        INS_sve_cdot,       INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation|HW_Flag_SpecialImport|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(Sve2,          DotProductRotateComplex,                                                -1,      4,     {INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_sve_cdot,       INS_invalid,        INS_sve_cdot,       INS_invalid,        INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_HasImmediateOperand)
+HARDWARE_INTRINSIC(Sve2,          DotProductRotateComplexBySelectedIndex,                                 -1,      5,     {INS_sve_cdot,       INS_invalid,        INS_sve_cdot,       INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation|HW_Flag_SpecialImport|HW_Flag_BaseTypeFromSecondArg)
 HARDWARE_INTRINSIC(Sve2,          FusedAddHalving,                                                  -1,      -1,    {INS_sve_shadd,      INS_sve_uhadd,      INS_sve_shadd,      INS_sve_uhadd,      INS_sve_shadd,      INS_sve_uhadd,      INS_sve_shadd,      INS_sve_uhadd,      INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_LowMaskedOperation)
 HARDWARE_INTRINSIC(Sve2,          FusedSubtractHalving,                                             -1,      -1,    {INS_sve_shsub,      INS_sve_uhsub,      INS_sve_shsub,      INS_sve_uhsub,      INS_sve_shsub,      INS_sve_uhsub,      INS_sve_shsub,      INS_sve_uhsub,      INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_LowMaskedOperation)
 HARDWARE_INTRINSIC(Sve2,          InterleavingXorEvenOdd,                                           -1,      3,     {INS_sve_eorbt,      INS_sve_eorbt,      INS_sve_eorbt,      INS_sve_eorbt,      INS_sve_eorbt,      INS_sve_eorbt,      INS_sve_eorbt,      INS_sve_eorbt,      INS_invalid,        INS_invalid},     HW_Category_SIMD,                  HW_Flag_Scalable|HW_Flag_HasRMWSemantics)
diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp
@@ -4091,7 +4091,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
             case NI_Sve_FusedMultiplyAddBySelectedScalar:
             case NI_Sve_FusedMultiplySubtractBySelectedScalar:
             case NI_Sve_MultiplyAddRotateComplex:
-            case NI_Sve2_DotProductComplex:
+            case NI_Sve2_DotProductRotateComplex:
                 assert(hasImmediateOperand);
                 assert(varTypeIsIntegral(intrin.op4));
                 if (intrin.op4->IsCnsIntOrI())
@@ -4149,7 +4149,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
                 break;
 
             case NI_Sve_MultiplyAddRotateComplexBySelectedScalar:
-            case NI_Sve2_DotProductComplexBySelectedIndex:
+            case NI_Sve2_DotProductRotateComplexBySelectedIndex:
                 assert(hasImmediateOperand);
                 assert(varTypeIsIntegral(intrin.op4));
                 assert(varTypeIsIntegral(intrin.op5));
diff --git a/src/coreclr/jit/lsraarm64.cpp b/src/coreclr/jit/lsraarm64.cpp
@@ -1710,7 +1710,7 @@ void LinearScan::BuildHWIntrinsicImmediate(GenTreeHWIntrinsic* intrinsicTree, co
                     break;
 
                 case NI_Sve_MultiplyAddRotateComplexBySelectedScalar:
-                case NI_Sve2_DotProductComplexBySelectedIndex:
+                case NI_Sve2_DotProductRotateComplexBySelectedIndex:
                     // This API has two immediates, one of which is used to index pairs of floats in a vector.
                     // For a vector width of 128 bits, this means the index's range is [0, 1],
                     // which means we will skip the above jump table register check,
@@ -1735,7 +1735,7 @@ void LinearScan::BuildHWIntrinsicImmediate(GenTreeHWIntrinsic* intrinsicTree, co
                     break;
 
                 case NI_Sve_MultiplyAddRotateComplex:
-                case NI_Sve2_DotProductComplex:
+                case NI_Sve2_DotProductRotateComplex:
                     needBranchTargetReg = !intrin.op4->isContainedIntOrIImmed();
                     break;
 
@@ -2166,7 +2166,7 @@ SingleTypeRegSet LinearScan::getOperandCandidates(GenTreeHWIntrinsic* intrinsicT
             case NI_Sve_FusedMultiplyAddBySelectedScalar:
             case NI_Sve_FusedMultiplySubtractBySelectedScalar:
             case NI_Sve_MultiplyAddRotateComplexBySelectedScalar:
-            case NI_Sve2_DotProductComplexBySelectedIndex:
+            case NI_Sve2_DotProductRotateComplexBySelectedIndex:
             case NI_Sve2_MultiplyAddBySelectedScalar:
             case NI_Sve2_MultiplyBySelectedScalarWideningEvenAndAdd:
             case NI_Sve2_MultiplyBySelectedScalarWideningOddAndAdd:
@@ -2188,7 +2188,7 @@ SingleTypeRegSet LinearScan::getOperandCandidates(GenTreeHWIntrinsic* intrinsicT
         if (isLowVectorOpNum)
         {
             unsigned baseElementSize = genTypeSize(intrin.baseType);
-            if (intrin.id == NI_Sve2_DotProductComplexBySelectedIndex)
+            if (intrin.id == NI_Sve2_DotProductRotateComplexBySelectedIndex)
             {
                 baseElementSize = intrin.baseType == TYP_BYTE ? 4 : 8;
             }
diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs
@@ -1008,25 +1008,25 @@ internal Arm64() { }
         /// svint32_t svcdot[_s32](svint32_t op1, svint8_t op2, svint8_t op3, uint64_t imm_rotation)
         ///   CDOT Ztied1.S, Zop2.B, Zop3.B, #imm_rotation
         /// </summary>
-        public static Vector<int> DotProductComplex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw new PlatformNotSupportedException(); }
+        public static Vector<int> DotProductRotateComplex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// svint64_t svcdot[_s64](svint64_t op1, svint16_t op2, svint16_t op3, uint64_t imm_rotation)
         ///   CDOT Ztied1.D, Zop2.H, Zop3.H, #imm_rotation
         /// </summary>
-        public static Vector<long> DotProductComplex(Vector<long> op1, Vector<short> op2, Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw new PlatformNotSupportedException(); }
+        public static Vector<long> DotProductRotateComplex(Vector<long> op1, Vector<short> op2, Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// svint32_t svcdot_lane[_s32](svint32_t op1, svint8_t op2, svint8_t op3, uint64_t imm_index, uint64_t imm_rotation)
         ///   CDOT Ztied1.S, Zop2.B, Zop3.B[imm_index], #imm_rotation
         /// </summary>
-        public static Vector<int> DotProductComplexBySelectedIndex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, byte imm_index, [ConstantExpected] byte rotation) { throw new PlatformNotSupportedException(); }
+        public static Vector<int> DotProductRotateComplexBySelectedIndex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte imm_index, [ConstantExpected] byte rotation) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// svint64_t svcdot_lane[_s64](svint64_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index, uint64_t imm_rotation)
         ///   CDOT Ztied1.D, Zop2.H, Zop3.H[imm_index], #imm_rotation
         /// </summary>
-        public static Vector<long> DotProductComplexBySelectedIndex(Vector<long> op1, Vector<short> op2, Vector<short> op3, byte imm_index, [ConstantExpected] byte rotation) { throw new PlatformNotSupportedException(); }
+        public static Vector<long> DotProductRotateComplexBySelectedIndex(Vector<long> op1, Vector<short> op2, Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(1))] byte imm_index, [ConstantExpected] byte rotation) { throw new PlatformNotSupportedException(); }
 
 
         // Halving add
diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs
@@ -1008,25 +1008,25 @@ internal Arm64() { }
         /// svint32_t svcdot[_s32](svint32_t op1, svint8_t op2, svint8_t op3, uint64_t imm_rotation)
         ///   CDOT Ztied1.S, Zop2.B, Zop3.B, #imm_rotation
         /// </summary>
-        public static Vector<int> DotProductComplex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductComplex(op1, op2, op3, rotation);
+        public static Vector<int> DotProductRotateComplex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductRotateComplex(op1, op2, op3, rotation);
 
         /// <summary>
         /// svint64_t svcdot[_s64](svint64_t op1, svint16_t op2, svint16_t op3, uint64_t imm_rotation)
         ///   CDOT Ztied1.D, Zop2.H, Zop3.H, #imm_rotation
         /// </summary>
-        public static Vector<long> DotProductComplex(Vector<long> op1, Vector<short> op2, Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductComplex(op1, op2, op3, rotation);
+        public static Vector<long> DotProductRotateComplex(Vector<long> op1, Vector<short> op2, Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductRotateComplex(op1, op2, op3, rotation);
 
         /// <summary>
         /// svint32_t svcdot_lane[_s32](svint32_t op1, svint8_t op2, svint8_t op3, uint64_t imm_index, uint64_t imm_rotation)
         ///   CDOT Ztied1.S, Zop2.B, Zop3.B[imm_index], #imm_rotation
         /// </summary>
-        public static Vector<int> DotProductComplexBySelectedIndex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductComplexBySelectedIndex(op1, op2, op3, imm_index, rotation);
+        public static Vector<int> DotProductRotateComplexBySelectedIndex(Vector<int> op1, Vector<sbyte> op2, Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductRotateComplexBySelectedIndex(op1, op2, op3, imm_index, rotation);
 
         /// <summary>
         /// svint64_t svcdot_lane[_s64](svint64_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index, uint64_t imm_rotation)
         ///   CDOT Ztied1.D, Zop2.H, Zop3.H[imm_index], #imm_rotation
         /// </summary>
-        public static Vector<long> DotProductComplexBySelectedIndex(Vector<long> op1, Vector<short> op2, Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(1))] byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductComplexBySelectedIndex(op1, op2, op3, imm_index, rotation);
+        public static Vector<long> DotProductRotateComplexBySelectedIndex(Vector<long> op1, Vector<short> op2, Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(1))] byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) => DotProductRotateComplexBySelectedIndex(op1, op2, op3, imm_index, rotation);
 
 
         // Halving add
diff --git a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs
@@ -6253,10 +6253,10 @@ internal Arm64() { }
         public static System.Numerics.Vector<ushort> BitwiseSelectRightInverted(System.Numerics.Vector<ushort> select, System.Numerics.Vector<ushort> left, System.Numerics.Vector<ushort> right) { throw null; }
         public static System.Numerics.Vector<uint> BitwiseSelectRightInverted(System.Numerics.Vector<uint> select, System.Numerics.Vector<uint> left, System.Numerics.Vector<uint> right) { throw null; }
         public static System.Numerics.Vector<ulong> BitwiseSelectRightInverted(System.Numerics.Vector<ulong> select, System.Numerics.Vector<ulong> left, System.Numerics.Vector<ulong> right) { throw null; }
-        public static System.Numerics.Vector<int> DotProductComplex(System.Numerics.Vector<int> op1, System.Numerics.Vector<sbyte> op2, System.Numerics.Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
-        public static System.Numerics.Vector<long> DotProductComplex(System.Numerics.Vector<long> op1, System.Numerics.Vector<short> op2, System.Numerics.Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
-        public static System.Numerics.Vector<int> DotProductComplexBySelectedIndex(System.Numerics.Vector<int> op1, System.Numerics.Vector<sbyte> op2, System.Numerics.Vector<sbyte> op3, byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
-        public static System.Numerics.Vector<long> DotProductComplexBySelectedIndex(System.Numerics.Vector<long> op1, System.Numerics.Vector<short> op2, System.Numerics.Vector<short> op3, byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
+        public static System.Numerics.Vector<int> DotProductRotateComplex(System.Numerics.Vector<int> op1, System.Numerics.Vector<sbyte> op2, System.Numerics.Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
+        public static System.Numerics.Vector<long> DotProductRotateComplex(System.Numerics.Vector<long> op1, System.Numerics.Vector<short> op2, System.Numerics.Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
+        public static System.Numerics.Vector<int> DotProductRotateComplexBySelectedIndex(System.Numerics.Vector<int> op1, System.Numerics.Vector<sbyte> op2, System.Numerics.Vector<sbyte> op3, [ConstantExpected(Min = 0, Max = (byte)(3))] byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
+        public static System.Numerics.Vector<long> DotProductRotateComplexBySelectedIndex(System.Numerics.Vector<long> op1, System.Numerics.Vector<short> op2, System.Numerics.Vector<short> op3, [ConstantExpected(Min = 0, Max = (byte)(1))] byte imm_index, [ConstantExpected(Min = 0, Max = (byte)(3))] byte rotation) { throw null; }
         public static System.Numerics.Vector<byte> FusedAddHalving(System.Numerics.Vector<byte> left, System.Numerics.Vector<byte> right) { throw null; }
         public static System.Numerics.Vector<short> FusedAddHalving(System.Numerics.Vector<short> left, System.Numerics.Vector<short> right) { throw null; }
         public static System.Numerics.Vector<int> FusedAddHalving(System.Numerics.Vector<int> left, System.Numerics.Vector<int> right) { throw null; }
diff --git a/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs b/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs
diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs

Original file line number	Diff line number	Diff line change
`@@ -1275,7 +1275,7 @@ struct HWIntrinsicInfo`
`1275`	`1275`	`}`
`1276`	`1276`
`1277`	`1277`	`case NI_Sve_MultiplyAddRotateComplexBySelectedScalar:`
`1278`		`- case NI_Sve2_DotProductComplexBySelectedIndex:`
	`1278`	`+ case NI_Sve2_DotProductRotateComplexBySelectedIndex:`
`1279`	`1279`	`{`
`1280`	`1280`	`assert(sig->numArgs == 5);`
`1281`	`1281`	`*imm1Pos = 0;`
Original file line number	Diff line number	Diff line change
`@@ -485,7 +485,7 @@ void HWIntrinsicInfo::lookupImmBounds(`
`485`	`485`	`break;`
`486`	`486`
`487`	`487`	`case NI_Sve_MultiplyAddRotateComplex:`
`488`		`- case NI_Sve2_DotProductComplex:`
	`488`	`+ case NI_Sve2_DotProductRotateComplex:`
`489`	`489`	`immLowerBound = 0;`
`490`	`490`	`immUpperBound = 3;`
`491`	`491`	`break;`
`@@ -511,7 +511,7 @@ void HWIntrinsicInfo::lookupImmBounds(`
`511`	`511`	`}`
`512`	`512`	`break;`
`513`	`513`
`514`		`- case NI_Sve2_DotProductComplexBySelectedIndex:`
	`514`	`+ case NI_Sve2_DotProductRotateComplexBySelectedIndex:`
`515`	`515`	`if (immNumber == 1)`
`516`	`516`	`{`
`517`	`517`	`// Bounds for rotation`
`@@ -3215,7 +3215,7 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,`
`3215`	`3215`	`}`
`3216`	`3216`
`3217`	`3217`	`case NI_Sve_MultiplyAddRotateComplexBySelectedScalar:`
`3218`		`- case NI_Sve2_DotProductComplexBySelectedIndex:`
	`3218`	`+ case NI_Sve2_DotProductRotateComplexBySelectedIndex:`
`3219`	`3219`	`{`
`3220`	`3220`	`assert(sig->numArgs == 5);`
`3221`	`3221`	`assert(!isScalar);`
Original file line number	Diff line number	Diff line change
`@@ -2737,7 +2737,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)`
`2737`	`2737`	`GetEmitter()->emitInsSve_R_R_R(ins, emitSize, targetReg, op3Reg, op1Reg, INS_OPTS_SCALABLE_D);`
`2738`	`2738`	`break;`
`2739`	`2739`
`2740`		`- case NI_Sve2_DotProductComplex:`
	`2740`	`+ case NI_Sve2_DotProductRotateComplex:`
`2741`	`2741`	`{`
`2742`	`2742`	`assert(isRMW);`
`2743`	`2743`	`assert(hasImmediateOperand);`
`@@ -2758,7 +2758,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)`
`2758`	`2758`	`break;`
`2759`	`2759`	`}`
`2760`	`2760`
`2761`		`- case NI_Sve2_DotProductComplexBySelectedIndex:`
	`2761`	`+ case NI_Sve2_DotProductRotateComplexBySelectedIndex:`
`2762`	`2762`	`{`
`2763`	`2763`	`assert(isRMW);`
`2764`	`2764`	`assert(hasImmediateOperand);`