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Chen ZhenhuaAvenger-285714
Chen Zhenhua
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Avenger-285714
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arm64: dts: phytium: Add dts for Phytium Pe220x demo boards
Add support for Phytium Pe220x demo boards which covers all three variants of Pe220x SoC series. Signed-off-by: Chen Zhenhua <[email protected]> Signed-off-by: Feng Jun <[email protected]> Signed-off-by: Lai Xueyu <[email protected]> Signed-off-by: Chen Baozi <[email protected]> Signed-off-by: Wang Yinfeng <[email protected]> Signed-off-by: Jiakun Shuai <[email protected]> Change-Id: I2cb696deeed73e8471491cad1baaa7abf334c711
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‎arch/arm64/boot/dts/phytium/Makefile‎

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dtb-$(CONFIG_ARCH_PHYTIUM) += pe2204-demo-ddr4.dtb
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dtb-$(CONFIG_ARCH_PHYTIUM) += pe2204-demo-ddr4-local.dtb
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dtb-$(CONFIG_ARCH_PHYTIUM) += pe2202-demo-ddr4.dtb
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dtb-$(CONFIG_ARCH_PHYTIUM) += pe2202-demo-ddr4-local.dtb
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dtb-$(CONFIG_ARCH_PHYTIUM) += pe2201-demo-ddr4.dtb
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always := $(dtb-y)
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subdir-y := $(dts-dirs)
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clean-files := *.dtb

‎arch/arm64/boot/dts/phytium/pe2201-demo-ddr4.dts‎

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// SPDX-License-Identifier: GPL-2.0
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/*
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* DTS file for Phytium Pe2201 demo board
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*
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* Copyright (C) 2022-2023, Phytium Technology Co., Ltd.
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*/
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/dts-v1/;
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/memreserve/ 0x80000000 0x10000;
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#include "pe2201.dtsi"
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/{
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model = "Pe2201 DEMO DDR4";
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compatible = "phytium,pe2201";
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chosen {
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stdout-path = "serial1:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x80000000>;
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};
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};
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&soc {
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mio9: i2c@28026000 {
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compatible = "phytium,i2c";
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reg = <0x0 0x28026000 0x0 0x1000>;
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interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sysclk_50mhz>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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};
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};
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&pcie {
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status = "okay";
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};
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&usb2_0 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usb2_1 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usb2_2 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&macb0 {
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phy-mode = "sgmii";
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use-mii;
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status = "okay";
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};
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&spi2 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&mmc0 {
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status = "okay";
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};
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&mmc1 {
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status = "okay";
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};

‎arch/arm64/boot/dts/phytium/pe2202-demo-ddr4-local.dts‎

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// SPDX-License-Identifier: GPL-2.0
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/*
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* DTS file for Phytium Pe2202 demo board
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*
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* Copyright (C) 2022-2023, Phytium Technology Co., Ltd.
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*/
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/dts-v1/;
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/memreserve/ 0x80000000 0x10000;
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#include "pe2202.dtsi"
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/{
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model = "Pe2202 DEMO LOCAL DDR4";
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compatible = "phytium,pe2202";
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chosen {
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stdout-path = "serial1:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x80000000>;
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};
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sound_card: sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "phytium,pe220x-i2s-audio";
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simple-audio-card,pin-switches = "mic-in";
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simple-audio-card,widgets = "Microphone", "mic-in";
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simple-audio-card,routing = "MIC2", "mic-in";
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simple-audio-card,cpu {
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sound-dai = <&i2s0>;
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};
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simple-audio-card,codec {
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sound-dai = <&codec0>;
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};
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};
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};
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&soc {
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mio9: i2c@28026000 {
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compatible = "phytium,i2c";
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reg = <0x0 0x28026000 0x0 0x1000>;
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interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sysclk_50mhz>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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rtc@32 {
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compatible = "wave,sd3078";
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reg = <0x32>;
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};
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};
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mio14: i2c@28030000 {
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compatible = "phytium,i2c";
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reg = <0x0 0x28030000 0x0 0x1000>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sysclk_50mhz>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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codec0: es8336@10 {
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#sound-dai-cells = <0>;
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compatible = "everest,es8336";
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reg = <0x10>;
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&usb2_0 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usb2_1 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usb2_2 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&macb0 {
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phy-mode = "sgmii";
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use-mii;
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status = "okay";
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};
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&sata1 {
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status = "okay";
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};
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&spi2 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&mmc0 {
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bus-width = <0x00000008>;
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max-frequency = <50000000>;
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cap-mmc-hw-reset;
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cap-mmc-highspeed;
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no-sdio;
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no-sd;
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non-removable;
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status = "okay";
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};
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&mmc1 {
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bus-width = <0x00000004>;
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max-frequency = <50000000>;
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cap-sdio-irq;
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cap-sd-highspeed;
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sd-uhs-sdr25;
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no-mmc;
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status = "okay";
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};
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&i2s0 {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&dc0 {
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pipe_mask = /bits/ 8 <0x2>;
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edp_mask = /bits/ 8 <0x0>;
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status = "okay";
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};

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