[CIR][CIRGen][Builtin][X86] Lower vec_set related intrinsics (llvm#1731)

Author: RiverDave

clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp

@@ -257,7 +257,23 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned BuiltinID,
   case X86::BI__builtin_ia32_vec_set_v16hi:
   case X86::BI__builtin_ia32_vec_set_v8si:
   case X86::BI__builtin_ia32_vec_set_v4di: {
-    llvm_unreachable("__builtin_ia32_vec_set_vXX NYI");
+    unsigned NumElts = cast<cir::VectorType>(Ops[0].getType()).getSize();
+
+    auto constOp = cast<cir::ConstantOp>(Ops[2].getDefiningOp());
+    auto intAttr = cast<cir::IntAttr>(constOp.getValue());
+    uint64_t index = intAttr.getValue().getZExtValue();
+
+    index &= NumElts - 1;
+
+    auto indexAttr = cir::IntAttr::get(
+        cir::IntType::get(&getMLIRContext(), 64, false), index);
+    auto indexVal =
+        builder.create<cir::ConstantOp>(getLoc(E->getExprLoc()), indexAttr);
+
+    // These builtins exist so we can ensure the index is an ICE and in range.
+    // Otherwise we could just do this in the header file.
+    return builder.create<cir::VecInsertOp>(getLoc(E->getExprLoc()), Ops[0],
+                                            Ops[1], indexVal);
   }
   case X86::BI_mm_setcsr:
   case X86::BI__builtin_ia32_ldmxcsr: {

clang/test/CIR/CodeGen/X86/avx-builtins.c

@@ -58,3 +58,45 @@ long long test_mm256_extract_epi64(__m256i A) {
   return _mm256_extract_epi64(A, 3);
 }
 #endif
+
+__m256i test_mm256_insert_epi8(__m256i x, char b) {
+
+  // CIR-CHECK-LABEL: test_mm256_insert_epi8
+  // CIR-CHECK-LABEL: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : {{!u32i|!u64i}}] : !cir.vector<{{!s8i|!u8i}} x 32>
+
+  // LLVM-CHECK-LABEL: test_mm256_insert_epi8
+  // LLVM-CHECK: insertelement <32 x i8> %{{.*}}, i8 %{{.*}}, {{i32|i64}} 14
+  return _mm256_insert_epi8(x, b, 14);
+}
+
+__m256i test_mm256_insert_epi16(__m256i x, int b) {
+
+  // CIR-CHECK-LABEL: test_mm256_insert_epi16
+  // CIR-CHECK: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : {{!u32i|!u64i}}] : !cir.vector<!s16i x 16>
+
+  // LLVM-CHECK-LABEL: test_mm256_insert_epi16
+  // LLVM-CHECK: insertelement <16 x i16> %{{.*}}, i16 %{{.*}}, {{i32|i64}} 4
+  return _mm256_insert_epi16(x, b, 4);
+}
+
+__m256i test_mm256_insert_epi32(__m256i x, int b) {
+
+  // CIR-CHECK-LABEL: test_mm256_insert_epi32
+  // CIR-CHECK: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : {{!u32i|!u64i}}] : !cir.vector<!s32i x 8>
+
+  // LLVM-CHECK-LABEL: test_mm256_insert_epi32
+  // LLVM-CHECK: insertelement <8 x i32> %{{.*}}, i32 %{{.*}}, {{i32|i64}} 5
+  return _mm256_insert_epi32(x, b, 5);
+}
+
+#ifdef __x86_64__
+__m256i test_mm256_insert_epi64(__m256i x, long long b) {
+
+  // CIR-X64-LABEL: test_mm256_insert_epi64
+  // CIR-X64: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : {{!u32i|!u64i}}] : !cir.vector<!s64i x 4>
+
+  // LLVM-X64-LABEL: test_mm256_insert_epi64
+  // LLVM-X64: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, {{i32|i64}} 2
+  return _mm256_insert_epi64(x, b, 2);
+}
+#endif

clang/test/CIR/CodeGen/X86/mmx-builtins.c

@@ -19,3 +19,13 @@ int test_mm_extract_pi16(__m64 a) {
   // LLVM-CHECK: extractelement <4 x i16> %{{.*}}, i64 2
   return _mm_extract_pi16(a, 2);
 }
+
+__m64 test_mm_insert_pi16(__m64 a, int d) {
+
+  // CIR-CHECK-LABEL: test_mm_insert_pi16
+  // CIR-CHECK-LABEL: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : !u64i] : !cir.vector<!s16i x 4>
+
+  // LLVM-CHECK-LABEL: test_mm_insert_pi16
+  // LLVM-CHECK: insertelement <4 x i16>
+  return _mm_insert_pi16(a, d, 2);
+}

clang/test/CIR/CodeGen/X86/sse41-builtins.c

@@ -48,3 +48,35 @@ int test_mm_extract_ps(__m128 x) {
   // LLVM-CHECK: extractelement <4 x float> %{{.*}}, {{i32|i64}} 1
   return _mm_extract_ps(x, 1);
 }
+
+__m128i test_mm_insert_epi8(__m128i x, char b) {
+
+  // CIR-CHECK-LABEL: test_mm_insert_epi8
+  // CIR-CHECK-LABEL: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : {{!u32i|!u64i}}] : !cir.vector<{{!s8i|!u8i}} x 16>
+
+  // LLVM-CHECK-LABEL: test_mm_insert_epi8 
+  // LLVM-CHECK: insertelement <16 x i8> %{{.*}}, i8 %{{.*}}, {{i32|i64}} 1
+  return _mm_insert_epi8(x, b, 1);
+}
+
+__m128i test_mm_insert_epi32(__m128i x, int b) {
+
+  // CIR-CHECK-LABEL: test_mm_insert_epi32
+  // CIR-CHECK-LABEL: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : {{!u32i|!u64i}}] : !cir.vector<!s32i x 4>
+
+  // LLVM-CHECK-LABEL: test_mm_insert_epi32
+  // LLVM-CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, {{i32|i64}} 1
+  return _mm_insert_epi32(x, b, 1);
+}
+
+#ifdef __x86_64__
+__m128i test_mm_insert_epi64(__m128i x, long long b) {
+
+  // CIR-X64-LABEL: test_mm_insert_epi64
+  // CIR-X64: {{%.*}} = cir.vec.insert {{%.*}}, {{%.*}}[{{%.*}} : {{!u32i|!u64i}}] : !cir.vector<!s64i x 2>
+
+  // LLVM-X64-LABEL: test_mm_insert_epi64
+  // LLVM-X64: insertelement <2 x i64> %{{.*}}, i64 %{{.*}}, {{i32|i64}} 1
+  return _mm_insert_epi64(x, b, 1);
+}
+#endif